Module Name:    src
Committed By:   msaitoh
Date:           Mon Nov 24 07:53:43 UTC 2014

Modified Files:
        src/sys/dev/pci: pci_subr.c pcireg.h

Log Message:
Add PCIe CRS Software Visibility bit.


To generate a diff of this commit:
cvs rdiff -u -r1.132 -r1.133 src/sys/dev/pci/pci_subr.c
cvs rdiff -u -r1.99 -r1.100 src/sys/dev/pci/pcireg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/pci/pci_subr.c
diff -u src/sys/dev/pci/pci_subr.c:1.132 src/sys/dev/pci/pci_subr.c:1.133
--- src/sys/dev/pci/pci_subr.c:1.132	Thu Oct 23 13:44:37 2014
+++ src/sys/dev/pci/pci_subr.c	Mon Nov 24 07:53:43 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: pci_subr.c,v 1.132 2014/10/23 13:44:37 msaitoh Exp $	*/
+/*	$NetBSD: pci_subr.c,v 1.133 2014/11/24 07:53:43 msaitoh Exp $	*/
 
 /*
  * Copyright (c) 1997 Zubin D. Dittia.  All rights reserved.
@@ -40,7 +40,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.132 2014/10/23 13:44:37 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.133 2014/11/24 07:53:43 msaitoh Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_pci.h"
@@ -1634,6 +1634,7 @@ pci_conf_print_pcie_cap(const pcireg_t *
 		/* Root Capability Register */
 		printf("    Root Capability Register: %04x\n",
 		    reg >> 16);
+		onoff("CRS Software Visibility", reg, PCIE_RCR_CRS_SV);
 
 		/* Root Status Register */
 		reg = regs[o2i(capoff + PCIE_RSR)];

Index: src/sys/dev/pci/pcireg.h
diff -u src/sys/dev/pci/pcireg.h:1.99 src/sys/dev/pci/pcireg.h:1.100
--- src/sys/dev/pci/pcireg.h:1.99	Thu Oct 23 13:45:41 2014
+++ src/sys/dev/pci/pcireg.h	Mon Nov 24 07:53:43 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: pcireg.h,v 1.99 2014/10/23 13:45:41 msaitoh Exp $	*/
+/*	$NetBSD: pcireg.h,v 1.100 2014/11/24 07:53:43 msaitoh Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996, 1999, 2000
@@ -976,6 +976,7 @@ typedef u_int8_t pci_revision_t;
 #define PCIE_RCR_SERR_FER	__BIT(2)       /* SERR on Fatal Error Enable */
 #define PCIE_RCR_PME_IE		__BIT(3)       /* PME Interrupt Enable */
 #define PCIE_RCR_CRS_SVE	__BIT(4)       /* CRS Software Visibility En */
+#define PCIE_RCR_CRS_SV		__BIT(16)      /* CRS Software Visibility */
 #define PCIE_RSR	0x20	/* Root Status Register */
 #define PCIE_RSR_PME_REQESTER	__BITS(15, 0)  /* PME Requester ID */
 #define PCIE_RSR_PME_STAT	__BIT(16)      /* PME Status */

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