Module Name: src
Committed By: macallan
Date: Wed Dec 17 16:50:08 UTC 2014
Modified Files:
src/sys/dev/pci: pm2fb.c pm2reg.h
Log Message:
- add support for Permedia 2
- make this work on alpha
from Naruaki Etomi
To generate a diff of this commit:
cvs rdiff -u -r1.26 -r1.27 src/sys/dev/pci/pm2fb.c
cvs rdiff -u -r1.9 -r1.10 src/sys/dev/pci/pm2reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/pm2fb.c
diff -u src/sys/dev/pci/pm2fb.c:1.26 src/sys/dev/pci/pm2fb.c:1.27
--- src/sys/dev/pci/pm2fb.c:1.26 Tue Dec 9 07:42:50 2014
+++ src/sys/dev/pci/pm2fb.c Wed Dec 17 16:50:08 2014
@@ -1,7 +1,8 @@
-/* $NetBSD: pm2fb.c,v 1.26 2014/12/09 07:42:50 macallan Exp $ */
+/* $NetBSD: pm2fb.c,v 1.27 2014/12/17 16:50:08 macallan Exp $ */
/*
* Copyright (c) 2009, 2012 Michael Lorenz
+ * 2014 Naruaki Etomi
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -27,11 +28,10 @@
/*
* A console driver for Permedia 2 graphics controllers
- * tested on sparc64 only so far
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pm2fb.c,v 1.26 2014/12/09 07:42:50 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pm2fb.c,v 1.27 2014/12/17 16:50:08 macallan Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -73,6 +73,18 @@ __KERNEL_RCSID(0, "$NetBSD: pm2fb.c,v 1.
#define DPRINTF while (0) printf
#endif
+#if BYTE_ORDER == LITTLE_ENDIAN
+/*
+ * XXX
+ * A temporary workaround for unaligned blits on little endian hardware.
+ * This makes pm2fb_bitblt() work well on little endian hardware to get
+ * scrolling right, but not much more. Unaligned blits ( as in, where the lower
+ * 2 bits of the source and destination X coordinates don't match ) are still
+ * wrong so the glyph cache is also disabled.
+ */
+#define BITBLT_LE_WORKAROUND
+#endif
+
struct pm2fb_softc {
device_t sc_dev;
@@ -184,10 +196,33 @@ static const struct i2c_bitbang_ops pm2f
/* mode setting stuff */
static int pm2fb_set_pll(struct pm2fb_softc *, int);
+static int pm2vfb_set_pll(struct pm2fb_softc *, int);
static uint8_t pm2fb_read_dac(struct pm2fb_softc *, int);
static void pm2fb_write_dac(struct pm2fb_softc *, int, uint8_t);
static void pm2fb_set_mode(struct pm2fb_softc *, const struct videomode *);
+const struct {
+ int vendor;
+ int product;
+ int flags;
+} pm2fb_pci_devices[] = {
+ {
+ PCI_VENDOR_3DLABS,
+ PCI_PRODUCT_3DLABS_PERMEDIA2V,
+ 0
+ },
+ {
+ PCI_VENDOR_TI,
+ PCI_PRODUCT_TI_TVP4020,
+ 1
+ },
+ {
+ 0,
+ 0,
+ 0
+ }
+};
+
/* this table is from xf86-video-glint */
#define PARTPROD(a,b,c) (((a)<<6) | ((b)<<3) | (c))
int partprodPermedia[] = {
@@ -250,26 +285,24 @@ pm2fb_flush_engine(struct pm2fb_softc *s
while (bus_space_read_4(sc->sc_memt, sc->sc_regh,
PM2_OUTPUT_FIFO_WORDS) == 0);
} while (bus_space_read_4(sc->sc_memt, sc->sc_regh, PM2_OUTPUT_FIFO) !=
- 0x188);
+ PM2_SYNC_TAG);
}
static int
pm2fb_match(device_t parent, cfdata_t match, void *aux)
{
struct pci_attach_args *pa = (struct pci_attach_args *)aux;
+ int i;
if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY)
return 0;
- if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_3DLABS)
- return 0;
- /*
- * only card tested on so far is a TechSource Raptor GFX 8P /
- * Sun PGX32, which happens to be a Permedia 2v
- */
- if (/*(PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3DLABS_PERMEDIA2) ||*/
- (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3DLABS_PERMEDIA2V))
- return 100;
+ for (i = 0; pm2fb_pci_devices[i].vendor; i++) {
+ if ((PCI_VENDOR(pa->pa_id) == pm2fb_pci_devices[i].vendor &&
+ PCI_PRODUCT(pa->pa_id) == pm2fb_pci_devices[i].product))
+ return 100;
+ }
+
return (0);
}
@@ -284,14 +317,21 @@ pm2fb_attach(device_t parent, device_t s
unsigned long defattr;
bool is_console;
uint32_t flags;
+ int i;
sc->sc_pc = pa->pa_pc;
sc->sc_pcitag = pa->pa_tag;
sc->sc_memt = pa->pa_memt;
sc->sc_iot = pa->pa_iot;
sc->sc_dev = self;
- sc->sc_is_pm2 = (PCI_PRODUCT(pa->pa_id) ==
- PCI_PRODUCT_3DLABS_PERMEDIA2);
+
+ for (i = 0; pm2fb_pci_devices[i].vendor; i++) {
+ if (PCI_PRODUCT(pa->pa_id) == pm2fb_pci_devices[i].product) {
+ sc->sc_is_pm2 = pm2fb_pci_devices[i].flags ;
+ break;
+ }
+ }
+
pci_aprint_devinfo(pa, NULL);
/*
@@ -725,11 +765,13 @@ pm2fb_write_dac(struct pm2fb_softc *sc,
{
pm2fb_wait(sc, 3);
if (sc->sc_is_pm2) {
+ pm2fb_wait(sc, 2);
bus_space_write_1(sc->sc_memt, sc->sc_regh,
PM2_DAC_PAL_WRITE_IDX, reg);
bus_space_write_1(sc->sc_memt, sc->sc_regh,
PM2_DAC_INDEX_DATA, data);
} else {
+ pm2fb_wait(sc, 3);
bus_space_write_1(sc->sc_memt, sc->sc_regh,
PM2V_DAC_INDEX_LOW, reg & 0xff);
bus_space_write_1(sc->sc_memt, sc->sc_regh,
@@ -903,7 +945,12 @@ pm2fb_bitblt(void *cookie, int xs, int y
rwi = (wi + 7) >> 2;
rxdelta = (xs & 0xffc) - (xd & 0xffc);
/* adjust for non-aligned x */
+#ifdef BITBLT_LE_WORKAROUND
+ /* I have no idea why this seems to work */
+ adjust = 1;
+#else
adjust = ((xd & 3) - (xs & 3));
+#endif
bus_space_write_4(sc->sc_memt, sc->sc_regh,
PM2_RE_PACKEDDATA_LIMIT,
(xd << 16) | (xd + wi) | (adjust << 29));
@@ -1001,6 +1048,16 @@ pm2fb_putchar(void *cookie, int row, int
data = (uint8_t *)font->data + uc * ri->ri_fontscale;
mode = PM2RM_MASK_MIRROR;
+#if BYTE_ORDER == LITTLE_ENDIAN
+ switch (ri->ri_font->stride) {
+ case 1:
+ mode |= 4 << 7;
+ break;
+ case 2:
+ mode |= 3 << 7;
+ break;
+ }
+#else
switch (ri->ri_font->stride) {
case 1:
mode |= 3 << 7;
@@ -1009,7 +1066,7 @@ pm2fb_putchar(void *cookie, int row, int
mode |= 2 << 7;
break;
}
-
+#endif
pm2fb_wait(sc, 8);
bus_space_write_4(sc->sc_memt, sc->sc_regh,
@@ -1099,9 +1156,13 @@ pm2fb_putchar_aa(void *cookie, int row,
return;
}
+#ifdef BITBLT_LE_WORKAROUND
+ rv = GC_NOPE;
+#else
rv = glyphcache_try(&sc->sc_gc, c, x, y, attr);
if (rv == GC_OK)
return;
+#endif
data8 = WSFONT_GLYPH(c, font);
@@ -1452,21 +1513,17 @@ pm2fb_i2c_write_byte(void *cookie, uint8
return (i2c_bitbang_write_byte(cookie, val, flags, &pm2fb_i2cbb_ops));
}
-#define RefClk 14318 /* all frequencies are in kHz */
static int
-pm2fb_set_pll(struct pm2fb_softc *sc, int freq)
+pm2vfb_set_pll(struct pm2fb_softc *sc, int freq)
{
int m, n, p, diff, out_freq, bm = 1, bn = 3, bp = 0,
bdiff = 1000000 /* , bfreq */;
int fi;
uint8_t temp;
- /*
- * this should work on PM2V, PM2 needs something slightly different
- */
for (m = 1; m < 128; m++) {
for (n = 2 * m + 1; n < 256; n++) {
- fi = RefClk * n / m;
+ fi = PM2_EXT_CLOCK_FREQ * n / m;
for (p = 0; p < 2; p++) {
out_freq = fi >> (p + 1);
diff = abs(out_freq - freq);
@@ -1498,12 +1555,126 @@ pm2fb_set_pll(struct pm2fb_softc *sc, in
return 0;
}
+static int
+pm2fb_set_pll(struct pm2fb_softc *sc, int freq)
+{
+ uint8_t reg, bm = 0, bn = 0, bp = 0;
+ unsigned int m, n, p, fi, diff, out_freq, bdiff = 1000000;
+
+ for (n = 2; n < 15; n++) {
+ for (m = 2 ; m < 256; m++) {
+ fi = PM2_EXT_CLOCK_FREQ * m / n;
+ if (fi >= PM2_PLL_FREQ_MIN && fi <= PM2_PLL_FREQ_MAX) {
+ for (p = 0; p < 5; p++) {
+ out_freq = fi >> p;
+ diff = abs(out_freq - freq);
+ if (diff < bdiff) {
+ bm = m;
+ bn = n;
+ bp = p;
+ bdiff = diff;
+ }
+ }
+ }
+ }
+ }
+
+ pm2fb_write_dac(sc, PM2_DAC_PIXELCLKA_M, bm);
+ pm2fb_write_dac(sc, PM2_DAC_PIXELCLKA_N, bn);
+ pm2fb_write_dac(sc, PM2_DAC_PIXELCLKA_P, (bp | 0x08));
+
+ do {
+ reg = bus_space_read_1(sc->sc_memt, sc->sc_regh,
+ PM2_DAC_INDEX_DATA);
+ } while (reg == PCLK_LOCKED);
+
+ return 0;
+}
+
+/*
+ * most of the following was adapted from the xf86-video-glint driver's
+ * pm2_dac.c (8bpp only)
+ */
+static void
+pm2fb_set_dac(struct pm2fb_softc *sc, const struct videomode *mode)
+{
+ int t1, t2, t3, t4, stride;
+ uint32_t vclk, tmp;
+ uint8_t sync = 0;
+
+ t1 = mode->hsync_start - mode->hdisplay;
+ t2 = mode->vsync_start - mode->vdisplay;
+ t3 = mode->hsync_end - mode->hsync_start;
+ t4 = mode->vsync_end - mode->vsync_start;
+
+ /* first round up to the next multiple of 32 */
+ stride = (mode->hdisplay + 31) & ~31;
+ /* then find the next bigger one that we have partial products for */
+ while ((partprodPermedia[stride >> 5] == -1) && (stride < 2048)) {
+ stride += 32;
+ }
+
+ bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_HTOTAL,
+ ((mode->htotal) >> 2) - 1);
+ bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_HSYNC_END,
+ (t1 + t3) >> 2);
+ bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_HSYNC_START,
+ (t1 >> 2));
+ bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_HBLANK_END,
+ (mode->htotal - mode->hdisplay) >> 2);
+ bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_HGATE_END,
+ (mode->htotal - mode->hdisplay) >> 2);
+ bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_SCREEN_STRIDE,
+ stride >> 3);
+
+ bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_VTOTAL,
+ mode->vtotal - 2);
+ bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_VSYNC_END,
+ t2 + t4 - 1);
+ bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_VSYNC_START,
+ t2 - 1);
+ bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_VBLANK_END,
+ mode->vtotal - mode->vdisplay);
+ bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_VIDEO_CONTROL,
+ PM2_VC_VIDEO_ENABLE |
+ PM2_VC_HSYNC_ACT_HIGH | PM2_VC_VSYNC_ACT_HIGH);
+
+ vclk = bus_space_read_4(sc->sc_memt, sc->sc_regh, PM2_VCLKCTL);
+ bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_VCLKCTL,
+ vclk & 0xfffffffc);
+
+ tmp = bus_space_read_4(sc->sc_memt, sc->sc_regh, PM2_CHIP_CONFIG);
+ bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_CHIP_CONFIG,
+ tmp & 0xffffffdd);
+
+ pm2fb_write_dac(sc, PM2_DAC_MODE_CONTROL, MOC_BUFFERFRONT);
+ pm2fb_set_pll(sc, mode->dot_clock);
+
+ sync = MC_PALETTE_8BIT;
+
+ if (!(mode->flags & VID_PHSYNC))
+ sync |= MC_HSYNC_INV;
+ if (!(mode->flags & VID_PVSYNC))
+ sync |= MC_VSYNC_INV;
+
+ pm2fb_write_dac(sc, PM2_DAC_MISC_CONTROL, sync);
+ pm2fb_write_dac(sc, PM2_DAC_COLOR_MODE,
+ CM_PALETTE | CM_GUI_ENABLE | CM_RGB);
+
+ sc->sc_width = mode->hdisplay;
+ sc->sc_height = mode->vdisplay;
+ sc->sc_depth = 8;
+ sc->sc_stride = stride;
+ aprint_normal_dev(sc->sc_dev, "pm2 using %d x %d in 8 bit, stride %d\n",
+ sc->sc_width, sc->sc_height, stride);
+}
+
/*
* most of the following was adapted from the xf86-video-glint driver's
* pm2v_dac.c
*/
static void
-pm2fb_set_mode(struct pm2fb_softc *sc, const struct videomode *mode)
+pm2vfb_set_dac(struct pm2fb_softc *sc, const struct videomode *mode)
{
int t1, t2, t3, t4, stride;
uint32_t vclk;
@@ -1551,7 +1722,7 @@ pm2fb_set_mode(struct pm2fb_softc *sc, c
bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_VCLKCTL,
vclk & 0xfffffffc);
- pm2fb_set_pll(sc, mode->dot_clock / 2);
+ pm2vfb_set_pll(sc, mode->dot_clock / 2);
pm2fb_write_dac(sc, PM2V_DAC_MISC_CONTROL, PM2V_DAC_8BIT);
if (mode->flags & VID_PHSYNC)
@@ -1566,6 +1737,16 @@ pm2fb_set_mode(struct pm2fb_softc *sc, c
sc->sc_height = mode->vdisplay;
sc->sc_depth = 8;
sc->sc_stride = stride;
- aprint_normal_dev(sc->sc_dev, "using %d x %d in 8 bit, stride %d\n",
+ aprint_normal_dev(sc->sc_dev, "pm2v using %d x %d in 8 bit, stride %d\n",
sc->sc_width, sc->sc_height, stride);
}
+
+static void
+pm2fb_set_mode(struct pm2fb_softc *sc, const struct videomode *mode)
+{
+ if (sc->sc_is_pm2) {
+ pm2fb_set_dac(sc, mode);
+ } else {
+ pm2vfb_set_dac(sc, mode);
+ }
+}
Index: src/sys/dev/pci/pm2reg.h
diff -u src/sys/dev/pci/pm2reg.h:1.9 src/sys/dev/pci/pm2reg.h:1.10
--- src/sys/dev/pci/pm2reg.h:1.9 Sun Dec 14 13:58:41 2014
+++ src/sys/dev/pci/pm2reg.h Wed Dec 17 16:50:08 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: pm2reg.h,v 1.9 2014/12/14 13:58:41 macallan Exp $ */
+/* $NetBSD: pm2reg.h,v 1.10 2014/12/17 16:50:08 macallan Exp $ */
/*
* Copyright (c) 2009 Michael Lorenz
@@ -33,6 +33,11 @@
#ifndef PM2_REG_H
#define PM2_REG_H
+/* all frequencies are in kHz */
+#define PM2_EXT_CLOCK_FREQ 14318
+#define PM2_PLL_FREQ_MIN 150000
+#define PM2_PLL_FREQ_MAX 300000
+
#define PM2_RESET 0x00000000 /* any write initiates a chip reset */
#define PM2_RESET_BUSY 0x80000000 /* reset in progress */
@@ -60,6 +65,8 @@
#define PM2_AP_SVGA 0x00000100
#define PM2_AP_ROM 0x00000200
+#define PM2_CHIP_CONFIG 0x00000070
+
#define PM2_BYPASS_MASK 0x00001100
#define PM2_FB_WRITE_MASK 0x00001140
@@ -149,6 +156,8 @@
#define CM_GUI_ENABLE 0x10
#define CM_RGB 0x20 /* BGR otherwise */
#define CM_TRUECOLOR 0x80 /* use palette for gamma correction */
+#define PM2_DAC_MODE_CONTROL 0x19
+#define MOC_BUFFERFRONT 0x00
#define PM2_DAC_MISC_CONTROL 0x1e
#define MC_POWERDOWN 0x01
@@ -325,5 +334,5 @@
#define PM2_RE_DATA 0x00008aa0 /* pixel data */
#define PM2_RE_SOURCEDATA 0x00008aa8 /* raw data */
-
+#define PM2_SYNC_TAG 0x188
#endif /* PM2_REG_H */
