Module Name: src
Committed By: jmcneill
Date: Sat Dec 27 19:14:34 UTC 2014
Modified Files:
src/sys/arch/arm/rockchip: rockchip_crureg.h
Log Message:
update some bits for rk3188
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/rockchip/rockchip_crureg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rockchip_crureg.h
diff -u src/sys/arch/arm/rockchip/rockchip_crureg.h:1.3 src/sys/arch/arm/rockchip/rockchip_crureg.h:1.4
--- src/sys/arch/arm/rockchip/rockchip_crureg.h:1.3 Sat Dec 27 16:18:50 2014
+++ src/sys/arch/arm/rockchip/rockchip_crureg.h Sat Dec 27 19:14:34 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: rockchip_crureg.h,v 1.3 2014/12/27 16:18:50 jmcneill Exp $ */
+/* $NetBSD: rockchip_crureg.h,v 1.4 2014/12/27 19:14:34 jmcneill Exp $ */
/*-
* Copyright (c) 2014 Jared D. McNeill <[email protected]>
@@ -72,14 +72,16 @@
#define CRU_CLKSEL_CON10_PERI_PLL_SEL_MASK __BIT(31)
#define CRU_CLKSEL_CON10_PERI_PCLK_DIV_CON_MASK __BITS(29,28)
-#define CRU_CLKSEL_CON10_PERI_HCLK_DIV_CON_MASK __BITS(25,24)
+#define CRU_CLKSEL_CON10_PERI_HCLK_DIV_CON_MASK __BITS(26,24)
#define CRU_CLKSEL_CON10_PERI_ACLK_DIV_CON_MASK __BITS(20,16)
#define CRU_CLKSEL_CON10_PERI_PLL_SEL __BIT(15)
#define CRU_CLKSEL_CON10_PERI_PCLK_DIV_CON __BITS(13,12)
-#define CRU_CLKSEL_CON10_PERI_HCLK_DIV_CON __BITS(9,8)
+#define CRU_CLKSEL_CON10_PERI_HCLK_DIV_CON __BITS(10,8)
#define CRU_CLKSEL_CON10_PERI_ACLK_DIV_CON __BITS(4,0)
+#define CRU_CLKSEL_CON11_MMC0_PLL_SEL_MASK __BIT(22)
#define CRU_CLKSEL_CON11_MMC0_DIV_CON_MASK __BITS(21,16)
+#define CRU_CLKSEL_CON11_MMC0_PLL_SEL __BIT(6)
#define CRU_CLKSEL_CON11_MMC0_DIV_CON __BITS(5,0)
#define CRU_GLB_SRST_FST_MAGIC 0xfdb9
