Module Name:    src
Committed By:   snj
Date:           Sat Mar 21 16:58:31 UTC 2015

Modified Files:
        src/sys/dev/mii [netbsd-7]: rgephy.c rgephyreg.h

Log Message:
Pull up following revision(s) (requested by jmcneill in ticket #624):
        sys/dev/mii/rgephy.c: revision 1.38
        sys/dev/mii/rgephyreg.h: revision 1.7
add RTL8211F support


To generate a diff of this commit:
cvs rdiff -u -r1.35.4.1 -r1.35.4.2 src/sys/dev/mii/rgephy.c
cvs rdiff -u -r1.6 -r1.6.34.1 src/sys/dev/mii/rgephyreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/mii/rgephy.c
diff -u src/sys/dev/mii/rgephy.c:1.35.4.1 src/sys/dev/mii/rgephy.c:1.35.4.2
--- src/sys/dev/mii/rgephy.c:1.35.4.1	Sat Jan 17 13:50:57 2015
+++ src/sys/dev/mii/rgephy.c	Sat Mar 21 16:58:31 2015
@@ -1,4 +1,4 @@
-/*	$NetBSD: rgephy.c,v 1.35.4.1 2015/01/17 13:50:57 martin Exp $	*/
+/*	$NetBSD: rgephy.c,v 1.35.4.2 2015/03/21 16:58:31 snj Exp $	*/
 
 /*
  * Copyright (c) 2003
@@ -33,7 +33,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rgephy.c,v 1.35.4.1 2015/01/17 13:50:57 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rgephy.c,v 1.35.4.2 2015/03/21 16:58:31 snj Exp $");
 
 
 /*
@@ -303,7 +303,14 @@ rgephy_service(struct mii_softc *sc, str
 		 * need to restart the autonegotiation process.  Read
 		 * the BMSR twice in case it's latched.
 		 */
-		if (sc->mii_mpd_rev >= 2) {
+		if (sc->mii_mpd_rev >= 6) {
+			/* RTL8211F */
+			reg = PHY_READ(sc, RGEPHY_MII_PHYSR);
+			if (reg & RGEPHY_PHYSR_LINK) {
+				sc->mii_ticks = 0;
+				break;
+			}
+		} else if (sc->mii_mpd_rev >= 2) {
 			/* RTL8211B(L) */
 			reg = PHY_READ(sc, RGEPHY_MII_SSR);
 			if (reg & RGEPHY_SSR_LINK) {
@@ -351,13 +358,17 @@ static void
 rgephy_status(struct mii_softc *sc)
 {
 	struct mii_data *mii = sc->mii_pdata;
-	int gstat, bmsr, bmcr;
+	int gstat, bmsr, bmcr, physr;
 	uint16_t ssr;
 
 	mii->mii_media_status = IFM_AVALID;
 	mii->mii_media_active = IFM_ETHER;
 
-	if (sc->mii_mpd_rev >= 2) {
+	if (sc->mii_mpd_rev >= 6) {
+		physr = PHY_READ(sc, RGEPHY_MII_PHYSR);
+		if (physr & RGEPHY_PHYSR_LINK)
+			mii->mii_media_status |= IFM_ACTIVE;
+	} else if (sc->mii_mpd_rev >= 2) {
 		ssr = PHY_READ(sc, RGEPHY_MII_SSR);
 		if (ssr & RGEPHY_SSR_LINK)
 			mii->mii_media_status |= IFM_ACTIVE;
@@ -387,7 +398,28 @@ rgephy_status(struct mii_softc *sc)
 		}
 	}
 
-	if (sc->mii_mpd_rev >= 2) {
+	if (sc->mii_mpd_rev >= 6) {
+		physr = PHY_READ(sc, RGEPHY_MII_PHYSR);
+		switch (__SHIFTOUT(physr, RGEPHY_PHYSR_SPEED)) {
+		case RGEPHY_PHYSR_SPEED_1000:
+			mii->mii_media_active |= IFM_1000_T;
+			break;
+		case RGEPHY_PHYSR_SPEED_100:
+			mii->mii_media_active |= IFM_100_TX;
+			break;
+		case RGEPHY_PHYSR_SPEED_10:
+			mii->mii_media_active |= IFM_10_T;
+			break;
+		default:
+			mii->mii_media_active |= IFM_NONE;
+			break;
+		}
+		if (physr & RGEPHY_PHYSR_DUPLEX)
+			mii->mii_media_active |= mii_phy_flowstatus(sc) |
+			    IFM_FDX;
+		else
+			mii->mii_media_active |= IFM_HDX;
+	} else if (sc->mii_mpd_rev >= 2) {
 		ssr = PHY_READ(sc, RGEPHY_MII_SSR);
 		switch (ssr & RGEPHY_SSR_SPD_MASK) {
 		case RGEPHY_SSR_S1000:

Index: src/sys/dev/mii/rgephyreg.h
diff -u src/sys/dev/mii/rgephyreg.h:1.6 src/sys/dev/mii/rgephyreg.h:1.6.34.1
--- src/sys/dev/mii/rgephyreg.h:1.6	Sun Jul 18 03:00:39 2010
+++ src/sys/dev/mii/rgephyreg.h	Sat Mar 21 16:58:31 2015
@@ -1,4 +1,4 @@
-/*	$NetBSD: rgephyreg.h,v 1.6 2010/07/18 03:00:39 jakllsch Exp $	*/
+/*	$NetBSD: rgephyreg.h,v 1.6.34.1 2015/03/21 16:58:31 snj Exp $	*/
 
 /*
  * Copyright (c) 2003
@@ -55,4 +55,22 @@
 #define RGEPHY_SSR_ALDPS	0x0008	/* RTL8211C(L) only */
 #define	RGEPHY_SSR_JABBER	0x0001	/* Jabber */
 
+/* RTL8211F */
+#define RGEPHY_MII_PHYSR	0x1a	/* PHY Specific status register */
+#define RGEPHY_PHYSR_ALDPS	__BIT(14)
+#define RGEPHY_PHYSR_MDI_PLUG	__BIT(13)
+#define RGEPHY_PHYSR_NWAY_EN	__BIT(12)
+#define RGEPHY_PHYSR_MASTER	__BIT(11)
+#define RGEPHY_PHYSR_EEE	__BIT(8)
+#define RGEPHY_PHYSR_RXFLOW_EN	__BIT(7)
+#define RGEPHY_PHYSR_TXFLOW_EN	__BIT(6)
+#define RGEPHY_PHYSR_SPEED	__BITS(5,4)
+#define RGEPHY_PHYSR_SPEED_10	0
+#define RGEPHY_PHYSR_SPEED_100	1
+#define RGEPHY_PHYSR_SPEED_1000	2
+#define RGEPHY_PHYSR_DUPLEX	__BIT(3)
+#define RGEPHY_PHYSR_LINK	__BIT(2)
+#define RGEPHY_PHYSR_MDI_XOVER	__BIT(1)
+#define RGEPHY_PHYSR_JABBER	__BIT(0)
+
 #endif /* _DEV_MII_RGEPHYREG_H_ */

Reply via email to