Module Name: src
Committed By: hikaru
Date: Fri May 1 06:58:40 UTC 2015
Modified Files:
src/sys/external/bsd/dwc2: dwc2var.h
src/sys/external/bsd/dwc2/dist: dwc2_core.c
Log Message:
Support external DMA mode and provide an interface for DMA address configuration
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/external/bsd/dwc2/dwc2var.h
cvs rdiff -u -r1.6 -r1.7 src/sys/external/bsd/dwc2/dist/dwc2_core.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/external/bsd/dwc2/dwc2var.h
diff -u src/sys/external/bsd/dwc2/dwc2var.h:1.3 src/sys/external/bsd/dwc2/dwc2var.h:1.4
--- src/sys/external/bsd/dwc2/dwc2var.h:1.3 Tue Oct 22 12:57:40 2013
+++ src/sys/external/bsd/dwc2/dwc2var.h Fri May 1 06:58:40 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: dwc2var.h,v 1.3 2013/10/22 12:57:40 skrll Exp $ */
+/* $NetBSD: dwc2var.h,v 1.4 2015/05/01 06:58:40 hikaru Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -77,6 +77,7 @@ typedef struct dwc2_softc {
bus_space_handle_t sc_ioh;
bus_dma_tag_t sc_dmat;
struct dwc2_core_params *sc_params;
+ int (*sc_set_dma_addr)(device_t, bus_addr_t, int);
/*
* Private
Index: src/sys/external/bsd/dwc2/dist/dwc2_core.c
diff -u src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.6 src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.7
--- src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.6 Thu Apr 3 06:34:58 2014
+++ src/sys/external/bsd/dwc2/dist/dwc2_core.c Fri May 1 06:58:40 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: dwc2_core.c,v 1.6 2014/04/03 06:34:58 skrll Exp $ */
+/* $NetBSD: dwc2_core.c,v 1.7 2015/05/01 06:58:40 hikaru Exp $ */
/*
* core.c - DesignWare HS OTG Controller common routines
@@ -43,7 +43,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: dwc2_core.c,v 1.6 2014/04/03 06:34:58 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: dwc2_core.c,v 1.7 2015/05/01 06:58:40 hikaru Exp $");
#include <sys/types.h>
#include <sys/bus.h>
@@ -312,8 +312,13 @@ static int dwc2_gahbcfg_init(struct dwc2
switch (hsotg->hw_params.arch) {
case GHWCFG2_EXT_DMA_ARCH:
- dev_err(hsotg->dev, "External DMA Mode not supported\n");
- return -EINVAL;
+ dev_dbg(hsotg->dev, "External DMA Mode\n");
+ if (hsotg->core_params->ahbcfg != -1) {
+ ahbcfg &= GAHBCFG_CTRL_MASK;
+ ahbcfg |= hsotg->core_params->ahbcfg &
+ ~GAHBCFG_CTRL_MASK;
+ }
+ break;
case GHWCFG2_INT_DMA_ARCH:
dev_dbg(hsotg->dev, "Internal DMA Mode\n");
@@ -1396,10 +1401,18 @@ void dwc2_hc_start_transfer(struct dwc2_
} else {
dma_addr = chan->xfer_dma;
}
- DWC2_WRITE_4(hsotg, HCDMA(chan->hc_num), (u32)dma_addr);
- if (dbg_hc(chan))
- dev_vdbg(hsotg->dev, "Wrote %08lx to HCDMA(%d)\n",
- (unsigned long)dma_addr, chan->hc_num);
+ if (hsotg->hsotg_sc->sc_set_dma_addr == NULL) {
+ DWC2_WRITE_4(hsotg, HCDMA(chan->hc_num),
+ (u32)dma_addr);
+ if (dbg_hc(chan))
+ dev_vdbg(hsotg->dev,
+ "Wrote %08lx to HCDMA(%d)\n",
+ (unsigned long)dma_addr,
+ chan->hc_num);
+ } else {
+ (void)(*hsotg->hsotg_sc->sc_set_dma_addr)(
+ hsotg->dev, dma_addr, chan->hc_num);
+ }
}
/* Start the split */
