Module Name:    src
Committed By:   msaitoh
Date:           Wed May 27 00:16:46 UTC 2015

Modified Files:
        src/sys/arch/x86/x86: coretemp.c

Log Message:
 - Change the Upper limit of Tjmax from 100 to 110 because some new
   CPUs have 105. This change is the same as FreeBSD.
 - Print Tjmax with aprint_verbose().
 - Reduce the diff against FreeBSD.


To generate a diff of this commit:
cvs rdiff -u -r1.33 -r1.34 src/sys/arch/x86/x86/coretemp.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/x86/x86/coretemp.c
diff -u src/sys/arch/x86/x86/coretemp.c:1.33 src/sys/arch/x86/x86/coretemp.c:1.34
--- src/sys/arch/x86/x86/coretemp.c:1.33	Thu Apr 23 23:23:00 2015
+++ src/sys/arch/x86/x86/coretemp.c	Wed May 27 00:16:46 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: coretemp.c,v 1.33 2015/04/23 23:23:00 pgoyette Exp $ */
+/* $NetBSD: coretemp.c,v 1.34 2015/05/27 00:16:46 msaitoh Exp $ */
 
 /*-
  * Copyright (c) 2011 The NetBSD Foundation, Inc.
@@ -61,7 +61,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: coretemp.c,v 1.33 2015/04/23 23:23:00 pgoyette Exp $");
+__KERNEL_RCSID(0, "$NetBSD: coretemp.c,v 1.34 2015/05/27 00:16:46 msaitoh Exp $");
 
 #include <sys/param.h>
 #include <sys/device.h>
@@ -168,7 +168,7 @@ coretemp_attach(device_t parent, device_
 	msr = __SHIFTOUT(msr, MSR_THERM_STATUS_RESOLUTION);
 
 	aprint_naive("\n");
-	aprint_normal(": thermal sensor, %u C resolution\n", (uint32_t)msr);
+	aprint_normal(": thermal sensor, %u C resolution", (uint32_t)msr);
 
 	sc->sc_sensor.units = ENVSYS_STEMP;
 	sc->sc_sensor.state = ENVSYS_SINVALID;
@@ -191,11 +191,14 @@ coretemp_attach(device_t parent, device_
 		goto fail;
 
 	coretemp_tjmax(self);
+	aprint_verbose(", Tjmax=%d", sc->sc_tjmax);
+	aprint_normal("\n");
 	return;
 
 fail:
 	sysmon_envsys_destroy(sc->sc_sme);
 	sc->sc_sme = NULL;
+	aprint_normal("\n");
 }
 
 static int
@@ -265,20 +268,11 @@ coretemp_tjmax(device_t self)
 	sc->sc_tjmax = 100;
 
 	/*
-	 * The mobile Penryn family.
-	 */
-	if (model == 0x17 && stepping == 0x06) {
-		sc->sc_tjmax = 105;
-		return;
-	}
-
-	/*
 	 * On some Core 2 CPUs, there is an undocumented
 	 * MSR that tells if Tj(max) is 100 or 85. Note
 	 * that MSR_IA32_EXT_CONFIG is not safe on all CPUs.
 	 */
-	if ((model == 0x0F && stepping >= 2) ||
-	    (model == 0x0E)) {
+	if ((model == 0x0F && stepping >= 2) || (model == 0x0E)) {
 
 		if (rdmsr_safe(MSR_IA32_EXT_CONFIG, &msr) == EFAULT)
 			return;
@@ -287,21 +281,22 @@ coretemp_tjmax(device_t self)
 			sc->sc_tjmax = 85;
 			return;
 		}
-	}
-
-	/*
-	 * Attempt to get Tj(max) from IA32_TEMPERATURE_TARGET,
-	 * but only consider the interval [70, 100] C as valid.
-	 * It is not fully known which CPU models have the MSR.
-	 */
-	if (model == 0x0E) {
-
+	} else if (model == 0x17 && stepping == 0x06) {
+		/* The mobile Penryn family. */
+		sc->sc_tjmax = 105;
+		return;
+	} else {
+		/*
+		 * Attempt to get Tj(max) from IA32_TEMPERATURE_TARGET,
+		 * but only consider the interval [70, 110] C as valid.
+		 * It is not fully known which CPU models have the MSR.
+		 */
 		if (rdmsr_safe(MSR_TEMPERATURE_TARGET, &msr) == EFAULT)
 			return;
 
 		msr = __SHIFTOUT(msr, MSR_TEMP_TARGET_READOUT);
 
-		if (msr >= 70 && msr <= 100) {
+		if (msr >= 70 && msr <= 110) {
 			sc->sc_tjmax = msr;
 			return;
 		}

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