Module Name: src
Committed By: msaitoh
Date: Wed May 27 05:33:30 UTC 2015
Modified Files:
src/sys/arch/arm/allwinner [netbsd-7]: awin_space.c
src/sys/arch/arm/amlogic [netbsd-7]: amlogic_space.c
src/sys/arch/arm/arm [netbsd-7]: cpufunc.c
src/sys/arch/arm/arm32 [netbsd-7]: bus_dma.c db_machdep.c pmap.c
src/sys/arch/arm/broadcom [netbsd-7]: bcm2835_space.c bcm53xx_pax.c
bcmgen_space.c
src/sys/arch/arm/include [netbsd-7]: lock.h locore.h mutex.h rwlock.h
src/sys/arch/arm/include/arm32 [netbsd-7]: pmap.h
src/sys/arch/arm/samsung [netbsd-7]: exynos_space.c
src/sys/arch/arm/zynq [netbsd-7]: zynq_space.c
Log Message:
Pull up following revision(s) (requested by skrll in ticket #805):
sys/arch/arm/include/arm32/pmap.h: revision 1.138
sys/arch/arm/arm/cpufunc.c: revision 1.151
sys/arch/arm/arm32/bus_dma.c: revision 1.90
sys/arch/arm/broadcom/bcm53xx_pax.c: revision 1.14
sys/arch/arm/arm32/bus_dma.c: revision 1.91
sys/arch/arm/samsung/exynos_space.c: revision 1.2
sys/arch/arm/arm32/db_machdep.c: revision 1.23
sys/arch/arm/allwinner/awin_space.c: revision 1.4
sys/arch/arm/include/rwlock.h: revision 1.9
sys/arch/arm/amlogic/amlogic_space.c: revision 1.2
sys/arch/arm/zynq/zynq_space.c: revision 1.2
sys/arch/arm/broadcom/bcm2835_space.c: revision 1.7
sys/arch/arm/arm32/pmap.c: revision 1.317
sys/arch/arm/include/locore.h: revision 1.19
sys/arch/arm/include/mutex.h: revision 1.20
sys/arch/arm/include/lock.h: revision 1.31
sys/arch/arm/include/lock.h: revision 1.32
sys/arch/arm/broadcom/bcmgen_space.c: revision 1.5
- Kill redundant semicolons.
- Indentation.
- Improve inline asm around dsb/dmb/isb:
- always use volatile and mark them as memory barrier
- use the common version from locore.h in all places not included from
userland
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.3.10.1 src/sys/arch/arm/allwinner/awin_space.c
cvs rdiff -u -r1.2.2.2 -r1.2.2.3 src/sys/arch/arm/amlogic/amlogic_space.c
cvs rdiff -u -r1.150 -r1.150.2.1 src/sys/arch/arm/arm/cpufunc.c
cvs rdiff -u -r1.86.2.2 -r1.86.2.3 src/sys/arch/arm/arm32/bus_dma.c
cvs rdiff -u -r1.21.4.1 -r1.21.4.2 src/sys/arch/arm/arm32/db_machdep.c
cvs rdiff -u -r1.295.2.6 -r1.295.2.7 src/sys/arch/arm/arm32/pmap.c
cvs rdiff -u -r1.6.10.1 -r1.6.10.2 src/sys/arch/arm/broadcom/bcm2835_space.c
cvs rdiff -u -r1.13 -r1.13.4.1 src/sys/arch/arm/broadcom/bcm53xx_pax.c
cvs rdiff -u -r1.4 -r1.4.6.1 src/sys/arch/arm/broadcom/bcmgen_space.c
cvs rdiff -u -r1.28.2.1 -r1.28.2.2 src/sys/arch/arm/include/lock.h
cvs rdiff -u -r1.16.6.1 -r1.16.6.2 src/sys/arch/arm/include/locore.h
cvs rdiff -u -r1.17 -r1.17.2.1 src/sys/arch/arm/include/mutex.h
cvs rdiff -u -r1.8 -r1.8.2.1 src/sys/arch/arm/include/rwlock.h
cvs rdiff -u -r1.135.2.1 -r1.135.2.2 src/sys/arch/arm/include/arm32/pmap.h
cvs rdiff -u -r1.1 -r1.1.8.1 src/sys/arch/arm/samsung/exynos_space.c
cvs rdiff -u -r1.2.4.2 -r1.2.4.3 src/sys/arch/arm/zynq/zynq_space.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/allwinner/awin_space.c
diff -u src/sys/arch/arm/allwinner/awin_space.c:1.3 src/sys/arch/arm/allwinner/awin_space.c:1.3.10.1
--- src/sys/arch/arm/allwinner/awin_space.c:1.3 Thu Feb 20 21:45:49 2014
+++ src/sys/arch/arm/allwinner/awin_space.c Wed May 27 05:33:29 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: awin_space.c,v 1.3 2014/02/20 21:45:49 matt Exp $ */
+/* $NetBSD: awin_space.c,v 1.3.10.1 2015/05/27 05:33:29 msaitoh Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: awin_space.c,v 1.3 2014/02/20 21:45:49 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: awin_space.c,v 1.3.10.1 2015/05/27 05:33:29 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -366,17 +366,8 @@ awin_bs_barrier(void *t, bus_space_handl
{
flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
- if (flags) {
- /* Issue an ARM11 Data Syncronisation Barrier (DSB) */
-#ifdef _ARM_ARCH_7
- __asm __volatile("dsb");
-#else
- __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)
- : "memory");
-#endif
- return;
- }
-
+ if (flags)
+ arm_dsb();
}
void *
Index: src/sys/arch/arm/amlogic/amlogic_space.c
diff -u src/sys/arch/arm/amlogic/amlogic_space.c:1.2.2.2 src/sys/arch/arm/amlogic/amlogic_space.c:1.2.2.3
--- src/sys/arch/arm/amlogic/amlogic_space.c:1.2.2.2 Sat Mar 21 08:51:17 2015
+++ src/sys/arch/arm/amlogic/amlogic_space.c Wed May 27 05:33:29 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: amlogic_space.c,v 1.2.2.2 2015/03/21 08:51:17 snj Exp $ */
+/* $NetBSD: amlogic_space.c,v 1.2.2.3 2015/05/27 05:33:29 msaitoh Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amlogic_space.c,v 1.2.2.2 2015/03/21 08:51:17 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amlogic_space.c,v 1.2.2.3 2015/05/27 05:33:29 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -366,17 +366,8 @@ amlogic_bs_barrier(void *t, bus_space_ha
{
flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
- if (flags) {
- /* Issue an ARM11 Data Syncronisation Barrier (DSB) */
-#ifdef _ARM_ARCH_7
- __asm __volatile("dsb");
-#else
- __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)
- : "memory");
-#endif
- return;
- }
-
+ if (flags)
+ arm_dsb();
}
void *
Index: src/sys/arch/arm/arm/cpufunc.c
diff -u src/sys/arch/arm/arm/cpufunc.c:1.150 src/sys/arch/arm/arm/cpufunc.c:1.150.2.1
--- src/sys/arch/arm/arm/cpufunc.c:1.150 Thu Jul 31 07:14:42 2014
+++ src/sys/arch/arm/arm/cpufunc.c Wed May 27 05:33:29 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.c,v 1.150 2014/07/31 07:14:42 skrll Exp $ */
+/* $NetBSD: cpufunc.c,v 1.150.2.1 2015/05/27 05:33:29 msaitoh Exp $ */
/*
* arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.150 2014/07/31 07:14:42 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.150.2.1 2015/05/27 05:33:29 msaitoh Exp $");
#include "opt_compat_netbsd.h"
#include "opt_cpuoptions.h"
@@ -1490,9 +1490,9 @@ get_cachesize_cp15(int cssr)
#if defined(CPU_ARMV7)
__asm volatile(".arch\tarmv7a");
__asm volatile("mcr p15, 2, %0, c0, c0, 0" :: "r" (cssr));
- __asm volatile("isb"); /* sync to the new cssr */
+ __asm volatile("isb" ::: "memory"); /* sync to the new cssr */
#else
- __asm volatile("mcr p15, 1, %0, c0, c0, 2" :: "r" (cssr));
+ __asm volatile("mcr p15, 1, %0, c0, c0, 2" :: "r" (cssr) : "memory");
#endif
__asm volatile("mrc p15, 1, %0, c0, c0, 0" : "=r" (csid));
return csid;
Index: src/sys/arch/arm/arm32/bus_dma.c
diff -u src/sys/arch/arm/arm32/bus_dma.c:1.86.2.2 src/sys/arch/arm/arm32/bus_dma.c:1.86.2.3
--- src/sys/arch/arm/arm32/bus_dma.c:1.86.2.2 Fri Nov 14 07:29:13 2014
+++ src/sys/arch/arm/arm32/bus_dma.c Wed May 27 05:33:29 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_dma.c,v 1.86.2.2 2014/11/14 07:29:13 martin Exp $ */
+/* $NetBSD: bus_dma.c,v 1.86.2.3 2015/05/27 05:33:29 msaitoh Exp $ */
/*-
* Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -35,7 +35,7 @@
#include "opt_arm_bus_space.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.86.2.2 2014/11/14 07:29:13 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.86.2.3 2015/05/27 05:33:29 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -832,13 +832,13 @@ _bus_dmamap_sync_segment(vaddr_t va, pad
*/
case BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE:
STAT_INCR(sync_postreadwrite);
- __asm __volatile("dmb" ::: "memory");;
+ arm_dmb();
cpu_dcache_inv_range(va, len);
cpu_sdcache_inv_range(va, pa, len);
break;
case BUS_DMASYNC_POSTREAD:
STAT_INCR(sync_postread);
- __asm __volatile("dmb" ::: "memory");;
+ arm_dmb();
cpu_dcache_inv_range(va, len);
cpu_sdcache_inv_range(va, pa, len);
break;
Index: src/sys/arch/arm/arm32/db_machdep.c
diff -u src/sys/arch/arm/arm32/db_machdep.c:1.21.4.1 src/sys/arch/arm/arm32/db_machdep.c:1.21.4.2
--- src/sys/arch/arm/arm32/db_machdep.c:1.21.4.1 Sun Nov 9 16:05:25 2014
+++ src/sys/arch/arm/arm32/db_machdep.c Wed May 27 05:33:29 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.c,v 1.21.4.1 2014/11/09 16:05:25 martin Exp $ */
+/* $NetBSD: db_machdep.c,v 1.21.4.2 2015/05/27 05:33:29 msaitoh Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe
@@ -33,7 +33,7 @@
#endif
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.21.4.1 2014/11/09 16:05:25 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.21.4.2 2015/05/27 05:33:29 msaitoh Exp $");
#include <sys/param.h>
#include <sys/cpu.h>
@@ -385,7 +385,7 @@ db_show_tlb_cmd(db_expr_t addr, bool hav
armreg_tlbdataop_write(
__SHIFTIN(va_index, dti->dti_index)
| __SHIFTIN(way, ARM_TLBDATAOP_WAY));
- __asm("isb");
+ arm_isb();
const uint32_t d0 = armreg_tlbdata0_read();
const uint32_t d1 = armreg_tlbdata1_read();
if ((d0 & ARM_TLBDATA_VALID)
@@ -406,7 +406,7 @@ db_show_tlb_cmd(db_expr_t addr, bool hav
armreg_tlbdataop_write(
__SHIFTIN(way, ARM_TLBDATAOP_WAY)
| __SHIFTIN(va_index, dti->dti_index));
- __asm("isb");
+ arm_isb();
const uint32_t d0 = armreg_tlbdata0_read();
const uint32_t d1 = armreg_tlbdata1_read();
if (d0 & ARM_TLBDATA_VALID) {
Index: src/sys/arch/arm/arm32/pmap.c
diff -u src/sys/arch/arm/arm32/pmap.c:1.295.2.6 src/sys/arch/arm/arm32/pmap.c:1.295.2.7
--- src/sys/arch/arm/arm32/pmap.c:1.295.2.6 Tue May 26 01:34:40 2015
+++ src/sys/arch/arm/arm32/pmap.c Wed May 27 05:33:29 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.295.2.6 2015/05/26 01:34:40 msaitoh Exp $ */
+/* $NetBSD: pmap.c,v 1.295.2.7 2015/05/27 05:33:29 msaitoh Exp $ */
/*
* Copyright 2003 Wasabi Systems, Inc.
@@ -217,7 +217,7 @@
#include <arm/locore.h>
//#include <arm/arm32/katelib.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.295.2.6 2015/05/26 01:34:40 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.295.2.7 2015/05/27 05:33:29 msaitoh Exp $");
//#define PMAP_DEBUG
#ifdef PMAP_DEBUG
@@ -974,9 +974,7 @@ pmap_pte_sync_current(pmap_t pm, pt_entr
{
if (PMAP_NEEDS_PTE_SYNC && pmap_is_cached(pm))
PTE_SYNC(ptep);
-#if ARM_MMU_V7 > 0
- __asm("dsb":::"memory");
-#endif
+ arm_dsb();
}
#ifdef PMAP_INCLUDE_PTE_SYNC
Index: src/sys/arch/arm/broadcom/bcm2835_space.c
diff -u src/sys/arch/arm/broadcom/bcm2835_space.c:1.6.10.1 src/sys/arch/arm/broadcom/bcm2835_space.c:1.6.10.2
--- src/sys/arch/arm/broadcom/bcm2835_space.c:1.6.10.1 Wed Mar 11 20:22:55 2015
+++ src/sys/arch/arm/broadcom/bcm2835_space.c Wed May 27 05:33:29 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2835_space.c,v 1.6.10.1 2015/03/11 20:22:55 snj Exp $ */
+/* $NetBSD: bcm2835_space.c,v 1.6.10.2 2015/05/27 05:33:29 msaitoh Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bcm2835_space.c,v 1.6.10.1 2015/03/11 20:22:55 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm2835_space.c,v 1.6.10.2 2015/05/27 05:33:29 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -361,13 +361,8 @@ bcm2835_bs_barrier(void *t, bus_space_ha
{
flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
- if (flags) {
- /* Issue an ARM11 Data Syncronisation Barrier (DSB) */
- __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)
- : "memory");
- return;
- }
-
+ if (flags)
+ arm_dsb();
}
void *
Index: src/sys/arch/arm/broadcom/bcm53xx_pax.c
diff -u src/sys/arch/arm/broadcom/bcm53xx_pax.c:1.13 src/sys/arch/arm/broadcom/bcm53xx_pax.c:1.13.4.1
--- src/sys/arch/arm/broadcom/bcm53xx_pax.c:1.13 Sun Mar 30 01:12:18 2014
+++ src/sys/arch/arm/broadcom/bcm53xx_pax.c Wed May 27 05:33:29 2015
@@ -34,7 +34,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: bcm53xx_pax.c,v 1.13 2014/03/30 01:12:18 matt Exp $");
+__KERNEL_RCSID(1, "$NetBSD: bcm53xx_pax.c,v 1.13.4.1 2015/05/27 05:33:29 msaitoh Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -419,12 +419,12 @@ bcmpax_conf_addr_write(struct bcmpax_sof
bcmpax_write_4(sc, PCIE_CFG_IND_ADDR,
__SHIFTIN(func, CFG_IND_ADDR_FUNC)
| __SHIFTIN(reg, CFG_IND_ADDR_REG));
- __asm __volatile("dsb");
+ arm_dsb();
return PCIE_CFG_IND_DATA;
}
if (sc->sc_linkup) {
bcmpax_write_4(sc, PCIE_CFG_ADDR, tag);
- __asm __volatile("dsb");
+ arm_dsb();
return PCIE_CFG_DATA;
}
return 0;
Index: src/sys/arch/arm/broadcom/bcmgen_space.c
diff -u src/sys/arch/arm/broadcom/bcmgen_space.c:1.4 src/sys/arch/arm/broadcom/bcmgen_space.c:1.4.6.1
--- src/sys/arch/arm/broadcom/bcmgen_space.c:1.4 Mon Oct 28 22:51:16 2013
+++ src/sys/arch/arm/broadcom/bcmgen_space.c Wed May 27 05:33:29 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: bcmgen_space.c,v 1.4 2013/10/28 22:51:16 matt Exp $ */
+/* $NetBSD: bcmgen_space.c,v 1.4.6.1 2015/05/27 05:33:29 msaitoh Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bcmgen_space.c,v 1.4 2013/10/28 22:51:16 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcmgen_space.c,v 1.4.6.1 2015/05/27 05:33:29 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -241,17 +241,8 @@ bcmgen_bs_barrier(void *t, bus_space_han
{
flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
- if (flags) {
- /* Issue an ARM11 Data Syncronisation Barrier (DSB) */
-#ifdef _ARM_ARCH_7
- __asm __volatile("dsb");
-#else
- __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)
- : "memory");
-#endif
- return;
- }
-
+ if (flags)
+ arm_dsb();
}
void *
Index: src/sys/arch/arm/include/lock.h
diff -u src/sys/arch/arm/include/lock.h:1.28.2.1 src/sys/arch/arm/include/lock.h:1.28.2.2
--- src/sys/arch/arm/include/lock.h:1.28.2.1 Sat Feb 21 18:22:01 2015
+++ src/sys/arch/arm/include/lock.h Wed May 27 05:33:29 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: lock.h,v 1.28.2.1 2015/02/21 18:22:01 martin Exp $ */
+/* $NetBSD: lock.h,v 1.28.2.2 2015/05/27 05:33:29 msaitoh Exp $ */
/*-
* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
@@ -143,9 +143,9 @@ static __inline void
__arm_membar_producer(void)
{
#ifdef _ARM_ARCH_7
- __asm __volatile("dsb");
+ __asm __volatile("dsb" ::: "memory");
#elif defined(_ARM_ARCH_6)
- __asm __volatile("mcr\tp15,0,%0,c7,c10,4" :: "r"(0));
+ __asm __volatile("mcr\tp15,0,%0,c7,c10,4" :: "r"(0) : "memory");
#endif
}
@@ -153,9 +153,9 @@ static __inline void
__arm_membar_consumer(void)
{
#ifdef _ARM_ARCH_7
- __asm __volatile("dmb");
+ __asm __volatile("dmb" ::: "memory");
#elif defined(_ARM_ARCH_6)
- __asm __volatile("mcr\tp15,0,%0,c7,c10,5" :: "r"(0));
+ __asm __volatile("mcr\tp15,0,%0,c7,c10,5" :: "r"(0) : "memory");
#endif
}
Index: src/sys/arch/arm/include/locore.h
diff -u src/sys/arch/arm/include/locore.h:1.16.6.1 src/sys/arch/arm/include/locore.h:1.16.6.2
--- src/sys/arch/arm/include/locore.h:1.16.6.1 Sat Nov 15 11:34:44 2014
+++ src/sys/arch/arm/include/locore.h Wed May 27 05:33:29 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.h,v 1.16.6.1 2014/11/15 11:34:44 martin Exp $ */
+/* $NetBSD: locore.h,v 1.16.6.2 2015/05/27 05:33:29 msaitoh Exp $ */
/*
* Copyright (c) 1994-1996 Mark Brinicombe.
@@ -240,7 +240,7 @@ arm_dmb(void)
if (CPU_IS_ARMV6_P())
armreg_dmb_write(0);
else if (CPU_IS_ARMV7_P())
- __asm __volatile("dmb");
+ __asm __volatile("dmb" ::: "memory");
}
static inline void
@@ -249,7 +249,7 @@ arm_dsb(void)
if (CPU_IS_ARMV6_P())
armreg_dsb_write(0);
else if (CPU_IS_ARMV7_P())
- __asm __volatile("dsb");
+ __asm __volatile("dsb" ::: "memory");
}
static inline void
@@ -258,7 +258,7 @@ arm_isb(void)
if (CPU_IS_ARMV6_P())
armreg_isb_write(0);
else if (CPU_IS_ARMV7_P())
- __asm __volatile("isb");
+ __asm __volatile("isb" ::: "memory");
}
#endif
Index: src/sys/arch/arm/include/mutex.h
diff -u src/sys/arch/arm/include/mutex.h:1.17 src/sys/arch/arm/include/mutex.h:1.17.2.1
--- src/sys/arch/arm/include/mutex.h:1.17 Fri Aug 8 07:34:02 2014
+++ src/sys/arch/arm/include/mutex.h Wed May 27 05:33:29 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: mutex.h,v 1.17 2014/08/08 07:34:02 skrll Exp $ */
+/* $NetBSD: mutex.h,v 1.17.2.1 2015/05/27 05:33:29 msaitoh Exp $ */
/*-
* Copyright (c) 2002, 2007 The NetBSD Foundation, Inc.
@@ -90,7 +90,7 @@ struct kmutex {
*/
#ifdef MULTIPROCESSOR
#ifdef _ARM_ARCH_7
-#define MUTEX_RECEIVE(mtx) __asm __volatile("dmb")
+#define MUTEX_RECEIVE(mtx) __asm __volatile("dmb" ::: "memory")
#else
#define MUTEX_RECEIVE(mtx) membar_consumer()
#endif
@@ -103,7 +103,7 @@ struct kmutex {
*/
#ifdef MULTIPROCESSOR
#ifdef _ARM_ARCH_7
-#define MUTEX_GIVE(mtx) __asm __volatile("dsb")
+#define MUTEX_GIVE(mtx) __asm __volatile("dsb" ::: "memory")
#else
#define MUTEX_GIVE(mtx) membar_producer()
#endif
Index: src/sys/arch/arm/include/rwlock.h
diff -u src/sys/arch/arm/include/rwlock.h:1.8 src/sys/arch/arm/include/rwlock.h:1.8.2.1
--- src/sys/arch/arm/include/rwlock.h:1.8 Thu Jun 12 08:50:52 2014
+++ src/sys/arch/arm/include/rwlock.h Wed May 27 05:33:29 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: rwlock.h,v 1.8 2014/06/12 08:50:52 ozaki-r Exp $ */
+/* $NetBSD: rwlock.h,v 1.8.2.1 2015/05/27 05:33:29 msaitoh Exp $ */
/*-
* Copyright (c) 2002, 2006 The NetBSD Foundation, Inc.
@@ -42,8 +42,8 @@ struct krwlock {
#ifdef MULTIPROCESSOR
#ifdef _ARM_ARCH_7
-#define RW_RECEIVE(rw) __asm __volatile("dmb")
-#define RW_GIVE(rw) __asm __volatile("dsb")
+#define RW_RECEIVE(rw) __asm __volatile("dmb" ::: "memory")
+#define RW_GIVE(rw) __asm __volatile("dsb" ::: "memory")
#else
#define RW_RECEIVE(rw) membar_consumer()
#define RW_GIVE(rw) membar_producer()
Index: src/sys/arch/arm/include/arm32/pmap.h
diff -u src/sys/arch/arm/include/arm32/pmap.h:1.135.2.1 src/sys/arch/arm/include/arm32/pmap.h:1.135.2.2
--- src/sys/arch/arm/include/arm32/pmap.h:1.135.2.1 Sun Nov 9 16:05:25 2014
+++ src/sys/arch/arm/include/arm32/pmap.h Wed May 27 05:33:29 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.135.2.1 2014/11/09 16:05:25 martin Exp $ */
+/* $NetBSD: pmap.h,v 1.135.2.2 2015/05/27 05:33:29 msaitoh Exp $ */
/*
* Copyright (c) 2002, 2003 Wasabi Systems, Inc.
@@ -78,6 +78,7 @@
#include "opt_multiprocessor.h"
#endif
#include <arm/cpufunc.h>
+#include <arm/locore.h>
#include <uvm/uvm_object.h>
#endif
@@ -511,9 +512,7 @@ pmap_ptesync(pt_entry_t *ptep, size_t cn
cnt * sizeof(pt_entry_t));
#endif
}
-#if ARM_MMU_V7 > 0
- __asm("dsb");
-#endif
+ arm_dsb();
}
#define PDE_SYNC(pdep) pmap_ptesync((pdep), 1)
Index: src/sys/arch/arm/samsung/exynos_space.c
diff -u src/sys/arch/arm/samsung/exynos_space.c:1.1 src/sys/arch/arm/samsung/exynos_space.c:1.1.8.1
--- src/sys/arch/arm/samsung/exynos_space.c:1.1 Sun Apr 13 02:26:26 2014
+++ src/sys/arch/arm/samsung/exynos_space.c Wed May 27 05:33:29 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: exynos_space.c,v 1.1 2014/04/13 02:26:26 matt Exp $ */
+/* $NetBSD: exynos_space.c,v 1.1.8.1 2015/05/27 05:33:29 msaitoh Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: exynos_space.c,v 1.1 2014/04/13 02:26:26 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: exynos_space.c,v 1.1.8.1 2015/05/27 05:33:29 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -366,17 +366,8 @@ exynos_bs_barrier(void *t, bus_space_han
{
flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
- if (flags) {
- /* Issue an ARM11 Data Syncronisation Barrier (DSB) */
-#ifdef _ARM_ARCH_7
- __asm __volatile("dsb");
-#else
- __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)
- : "memory");
-#endif
- return;
- }
-
+ if (flags)
+ arm_dsb();
}
void *
Index: src/sys/arch/arm/zynq/zynq_space.c
diff -u src/sys/arch/arm/zynq/zynq_space.c:1.2.4.2 src/sys/arch/arm/zynq/zynq_space.c:1.2.4.3
--- src/sys/arch/arm/zynq/zynq_space.c:1.2.4.2 Mon May 11 11:00:33 2015
+++ src/sys/arch/arm/zynq/zynq_space.c Wed May 27 05:33:30 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: zynq_space.c,v 1.2.4.2 2015/05/11 11:00:33 msaitoh Exp $ */
+/* $NetBSD: zynq_space.c,v 1.2.4.3 2015/05/27 05:33:30 msaitoh Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -29,7 +29,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: zynq_space.c,v 1.2.4.2 2015/05/11 11:00:33 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: zynq_space.c,v 1.2.4.3 2015/05/27 05:33:30 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -229,17 +229,8 @@ zynq_bs_barrier(void *t, bus_space_handl
{
flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
- if (flags) {
- /* Issue an ARM11 Data Syncronisation Barrier (DSB) */
-#ifdef _ARM_ARCH_7
- __asm __volatile("dsb");
-#else
- __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)
- : "memory");
-#endif
- return;
- }
-
+ if (flags)
+ arm_dsb();
}
void *
