Module Name: src
Committed By: macallan
Date: Fri Aug 7 17:41:43 UTC 2015
Modified Files:
src/sys/arch/evbmips/conf: CI20
Log Message:
add jzrng
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/evbmips/conf/CI20
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/evbmips/conf/CI20
diff -u src/sys/arch/evbmips/conf/CI20:1.14 src/sys/arch/evbmips/conf/CI20:1.15
--- src/sys/arch/evbmips/conf/CI20:1.14 Sat Jul 11 19:00:04 2015
+++ src/sys/arch/evbmips/conf/CI20 Fri Aug 7 17:41:43 2015
@@ -1,4 +1,4 @@
-# $NetBSD: CI20,v 1.14 2015/07/11 19:00:04 macallan Exp $
+# $NetBSD: CI20,v 1.15 2015/08/07 17:41:43 macallan Exp $
#
# MIPS Creator CI20
#
@@ -7,7 +7,7 @@ include "arch/evbmips/conf/std.ingenic"
#options INCLUDE_CONFIG_FILE # embed config file in kernel binary
-#ident "CI20-$Revision: 1.14 $"
+#ident "CI20-$Revision: 1.15 $"
maxusers 32
@@ -220,6 +220,9 @@ cd* at scsibus? target ? lun ? # SCSI C
# Ethernet
axe* at uhub? port ?
+# Random number generator
+jzrng0 at apbus0
+
# MII/PHY support
#acphy* at mii? phy ? # DAltima AC101 and AMD Am79c874 PHYs
#amhphy* at mii? phy ? # AMD 79c901 Ethernet PHYs
