Module Name:    src
Committed By:   macallan
Date:           Thu Oct  8 17:54:31 UTC 2015

Modified Files:
        src/sys/arch/mips/conf: files.ingenic
        src/sys/arch/mips/ingenic: apbus.c ingenic_regs.h
Added Files:
        src/sys/arch/mips/ingenic: ingenic_efuse.c

Log Message:
add a driver for the chip's EFUSE interface, use it to find the MAC address
for the onboard ethernet controller


To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/mips/conf/files.ingenic
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/mips/ingenic/apbus.c
cvs rdiff -u -r0 -r1.1 src/sys/arch/mips/ingenic/ingenic_efuse.c
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/mips/ingenic/ingenic_regs.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/conf/files.ingenic
diff -u src/sys/arch/mips/conf/files.ingenic:1.7 src/sys/arch/mips/conf/files.ingenic:1.8
--- src/sys/arch/mips/conf/files.ingenic:1.7	Fri Aug  7 17:39:58 2015
+++ src/sys/arch/mips/conf/files.ingenic	Thu Oct  8 17:54:30 2015
@@ -1,4 +1,4 @@
-#	$NetBSD: files.ingenic,v 1.7 2015/08/07 17:39:58 macallan Exp $
+#	$NetBSD: files.ingenic,v 1.8 2015/10/08 17:54:30 macallan Exp $
 
 include "dev/scsipi/files.scsipi"		# SCSI devices
 include "dev/ata/files.ata"			# ATA devices
@@ -45,3 +45,8 @@ defflag	opt_ingenic.h	JZMMC_DEBUG
 device	jzrng
 attach	jzrng at apbus with ingenic_rng
 file	arch/mips/ingenic/ingenic_rng.c	ingenic_rng
+
+# EFUSE
+device	efuse
+attach	efuse at apbus with ingenic_efuse
+file	arch/mips/ingenic/ingenic_efuse.c	ingenic_efuse

Index: src/sys/arch/mips/ingenic/apbus.c
diff -u src/sys/arch/mips/ingenic/apbus.c:1.17 src/sys/arch/mips/ingenic/apbus.c:1.18
--- src/sys/arch/mips/ingenic/apbus.c:1.17	Fri Aug  7 17:39:58 2015
+++ src/sys/arch/mips/ingenic/apbus.c	Thu Oct  8 17:54:30 2015
@@ -1,4 +1,4 @@
-/*	$NetBSD: apbus.c,v 1.17 2015/08/07 17:39:58 macallan Exp $ */
+/*	$NetBSD: apbus.c,v 1.18 2015/10/08 17:54:30 macallan Exp $ */
 
 /*-
  * Copyright (c) 2014 Michael Lorenz
@@ -29,7 +29,7 @@
 /* catch-all for on-chip peripherals */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: apbus.c,v 1.17 2015/08/07 17:39:58 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: apbus.c,v 1.18 2015/10/08 17:54:30 macallan Exp $");
 
 #include "locators.h"
 #define	_MIPS_BUS_DMA_PRIVATE
@@ -72,6 +72,7 @@ typedef struct apbus_dev {
 } apbus_dev_t;
 
 static const apbus_dev_t apbus_devs[] = {
+	{ "efuse",	JZ_EFUSE,	-1, 0, 0, 0},
 	{ "com",	JZ_UART0,	51, CLK_UART0, 0, 0},
 	{ "com",	JZ_UART1,	50, CLK_UART1, 0, 0},
 	{ "com",	JZ_UART2,	49, CLK_UART2, 0, 0},

Index: src/sys/arch/mips/ingenic/ingenic_regs.h
diff -u src/sys/arch/mips/ingenic/ingenic_regs.h:1.21 src/sys/arch/mips/ingenic/ingenic_regs.h:1.22
--- src/sys/arch/mips/ingenic/ingenic_regs.h:1.21	Fri Aug  7 17:37:54 2015
+++ src/sys/arch/mips/ingenic/ingenic_regs.h	Thu Oct  8 17:54:30 2015
@@ -1,4 +1,4 @@
-/*	$NetBSD: ingenic_regs.h,v 1.21 2015/08/07 17:37:54 macallan Exp $ */
+/*	$NetBSD: ingenic_regs.h,v 1.22 2015/10/08 17:54:30 macallan Exp $ */
 
 /*-
  * Copyright (c) 2014 Michael Lorenz
@@ -778,4 +778,42 @@ gpio_as_input(uint32_t g, int pin)
 	#define JZ_SMS_SDR50	0x00000004
 #define JZ_MSC_RTCNT	0x5c /* RT FIFO count */
 
+/* EFUSE Slave Interface */
+#define JZ_EFUSE	0x134100D0
+#define JZ_EFUCTRL	0x00
+	#define JZ_EFUSE_BANK	0x40000000	/* select upper 4KBit */
+	#define JZ_EFUSE_ADDR_M	0x3fe00000	/* in bytes */
+	#define JZ_EFUSE_ADDR_SHIFT	21
+	#define JZ_EFUSE_SIZE_M	0x001f0000	/* in bytes */
+	#define JZ_EFUSE_SIZE_SHIFT	16
+	#define JZ_EFUSE_PROG	0x00008000	/* enable programming */
+	#define JZ_EFUSE_WRITE	0x00000002	/* write enable */
+	#define JZ_EFUSE_READ	0x00000001	/* read enable */
+#define JZ_EFUCFG	0x04
+	#define JZ_EFUSE_INT_E		0x80000000	/* which IRQ? */
+	#define JZ_EFUSE_RD_ADJ_M	0x00f00000
+	#define JZ_EFUSE_RD_STROBE	0x000f0000
+	#define JZ_EFUSE_WR_ADJUST	0x0000f000
+	#define JZ_EFUSE_WR_STROBE	0x00000fff
+#define JZ_EFUSTATE	0x08
+	#define JZ_EFUSE_GLOBAL_P	0x00008000	/* wr protect bits */
+	#define JZ_EFUSE_CHIPID_P	0x00004000
+	#define JZ_EFUSE_CUSTID_P	0x00002000
+	#define JZ_EFUSE_SECWR_EN	0x00001000
+	#define JZ_EFUSE_PC_P		0x00000800
+	#define JZ_EFUSE_HDMIKEY_P	0x00000400
+	#define JZ_EFUSE_SECKEY_P	0x00000200
+	#define JZ_EFUSE_SECBOOT_EN	0x00000100
+	#define JZ_EFUSE_HDMI_BUSY	0x00000004
+	#define JZ_EFUSE_WR_DONE	0x00000002
+	#define JZ_EFUSE_RD_DONE	0x00000001
+#define JZ_EFUDATA0	0x0C
+#define JZ_EFUDATA1	0x10
+#define JZ_EFUDATA2	0x14
+#define JZ_EFUDATA3	0x18
+#define JZ_EFUDATA4	0x1C
+#define JZ_EFUDATA5	0x20
+#define JZ_EFUDATA6	0x24
+#define JZ_EFUDATA7	0x28
+
 #endif /* INGENIC_REGS_H */

Added files:

Index: src/sys/arch/mips/ingenic/ingenic_efuse.c
diff -u /dev/null src/sys/arch/mips/ingenic/ingenic_efuse.c:1.1
--- /dev/null	Thu Oct  8 17:54:31 2015
+++ src/sys/arch/mips/ingenic/ingenic_efuse.c	Thu Oct  8 17:54:30 2015
@@ -0,0 +1,130 @@
+/*	$NetBSD: ingenic_efuse.c,v 1.1 2015/10/08 17:54:30 macallan Exp $ */
+
+/*-
+ * Copyright (c) 2015 Michael Lorenz
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: ingenic_efuse.c,v 1.1 2015/10/08 17:54:30 macallan Exp $");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/mutex.h>
+#include <sys/bus.h>
+
+#include <mips/ingenic/ingenic_var.h>
+#include <mips/ingenic/ingenic_regs.h>
+
+#include "opt_ingenic.h"
+
+static int ingenic_efuse_match(device_t, struct cfdata *, void *);
+static void ingenic_efuse_attach(device_t, device_t, void *);
+
+struct efuse_softc {
+	device_t		sc_dev;
+	bus_space_tag_t		sc_iot;
+	bus_space_handle_t	sc_ioh;
+	uint8_t			sc_data[0x20];
+};
+
+static void ingenic_efuse_read(struct efuse_softc *, int, int, uint8_t *);
+
+void ingenic_set_enaddr(uint8_t *);
+
+CFATTACH_DECL_NEW(ingenic_efuse, sizeof(struct efuse_softc),
+    ingenic_efuse_match, ingenic_efuse_attach, NULL, NULL);
+
+/* ARGSUSED */
+static int
+ingenic_efuse_match(device_t parent, struct cfdata *match, void *aux)
+{
+	struct apbus_attach_args *aa = aux;
+
+	if (strcmp(aa->aa_name, "efuse") != 0)
+		return 0;
+
+	return 1;
+}
+
+/* ARGSUSED */
+static void
+ingenic_efuse_attach(device_t parent, device_t self, void *aux)
+{
+	struct efuse_softc *sc = device_private(self);
+	struct apbus_attach_args *aa = aux;
+	int error;
+
+	sc->sc_dev = self;
+
+	sc->sc_iot = aa->aa_bst;
+
+	if (aa->aa_addr == 0)
+		aa->aa_addr = JZ_EFUSE;
+
+	error = bus_space_map(aa->aa_bst, aa->aa_addr, 0x30, 0, &sc->sc_ioh);
+	if (error) {
+		aprint_error_dev(self,
+		    "can't map registers for %s: %d\n", aa->aa_name, error);
+		return;
+	}
+
+	aprint_naive(": Ingenic EFUSE Slave Interface\n");
+	aprint_normal(": Ingenic EFUSE Slave Interface\n");
+	ingenic_efuse_read(sc, 8, 0x20, sc->sc_data);
+	ingenic_set_enaddr(&sc->sc_data[0x1a]);
+#ifdef INGENIC_DEBUG
+	{
+		int i. j;
+		for (i = 0; i < 0x20; i += 8) {
+			printf("%02x:", i);
+			for (j = 0; j < 8; j++)
+				printf(" %02x", sc->sc_data[i + j]);
+			printf("\n");
+		}
+	}
+#endif
+}
+
+static void
+ingenic_efuse_read(struct efuse_softc *sc, int addr, int len, uint8_t *buf)
+{
+	uint32_t abuf;
+	int i;
+
+	bus_space_write_4(sc->sc_iot, sc->sc_ioh, JZ_EFUCFG, 0x00040000);
+	bus_space_write_4(sc->sc_iot, sc->sc_ioh, JZ_EFUCTRL,
+		JZ_EFUSE_READ |
+		(addr << JZ_EFUSE_ADDR_SHIFT) |
+		((len - 1) << JZ_EFUSE_SIZE_SHIFT));
+	do {} while ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, JZ_EFUSTATE) &
+		JZ_EFUSE_RD_DONE) == 0);
+	for (i = 0; i < len; i += 4) {
+		abuf = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
+		    JZ_EFUDATA0 + i);
+		memcpy(buf, &abuf, 4);
+		buf += 4;
+	}
+}
\ No newline at end of file

Reply via email to