Module Name: src
Committed By: jmcneill
Date: Sat Oct 17 21:17:15 UTC 2015
Modified Files:
src/sys/arch/arm/nvidia: tegra_reg.h
Log Message:
add GPU, SOR, and DPAUX offsets
To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/nvidia/tegra_reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/nvidia/tegra_reg.h
diff -u src/sys/arch/arm/nvidia/tegra_reg.h:1.13 src/sys/arch/arm/nvidia/tegra_reg.h:1.14
--- src/sys/arch/arm/nvidia/tegra_reg.h:1.13 Sat Aug 1 21:20:11 2015
+++ src/sys/arch/arm/nvidia/tegra_reg.h Sat Oct 17 21:17:15 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_reg.h,v 1.13 2015/08/01 21:20:11 jmcneill Exp $ */
+/* $NetBSD: tegra_reg.h,v 1.14 2015/10/17 21:17:15 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcne...@invisible.ca>
@@ -55,6 +55,8 @@
#define TEGRA_HOST1X_SIZE 0x00034000
#define TEGRA_GHOST_BASE 0x54000000
#define TEGRA_GHOST_SIZE 0x01000000
+#define TEGRA_GPU_BASE 0x57000000
+#define TEGRA_GPU_SIZE 0x02000000
#define TEGRA_PPSB_BASE 0x60000000
#define TEGRA_PPSB_SIZE 0x01000000
#define TEGRA_APB_BASE 0x70000000
@@ -146,5 +148,9 @@
#define TEGRA_DISPLAYB_SIZE 0x00040000
#define TEGRA_HDMI_OFFSET 0x00280000
#define TEGRA_HDMI_SIZE 0x00040000
+#define TEGRA_SOR_OFFSET 0x00540000
+#define TEGRA_SOR_SIZE 0x00040000
+#define TEGRA_DPAUX_OFFSET 0x005c0000
+#define TEGRA_DPAUX_SIZE 0x00040000
#endif /* _ARM_TEGRA_REG_H */
