Module Name: src
Committed By: msaitoh
Date: Thu Dec 24 14:16:18 UTC 2015
Modified Files:
src/sys/dev/ic: spdmem.c spdmemreg.h spdmemvar.h
Log Message:
- Add DDR4E, LPDDR3 and LPDDR4.
- Check NVDIMM hybrid.
- add DDR4's tWR and tWTR.
- Print cycle time with aprint_verbose on DDR4 as DDR[23].
To generate a diff of this commit:
cvs rdiff -u -r1.19 -r1.20 src/sys/dev/ic/spdmem.c
cvs rdiff -u -r1.3 -r1.4 src/sys/dev/ic/spdmemreg.h
cvs rdiff -u -r1.9 -r1.10 src/sys/dev/ic/spdmemvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/ic/spdmem.c
diff -u src/sys/dev/ic/spdmem.c:1.19 src/sys/dev/ic/spdmem.c:1.20
--- src/sys/dev/ic/spdmem.c:1.19 Tue Dec 8 02:09:23 2015
+++ src/sys/dev/ic/spdmem.c Thu Dec 24 14:16:18 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: spdmem.c,v 1.19 2015/12/08 02:09:23 pgoyette Exp $ */
+/* $NetBSD: spdmem.c,v 1.20 2015/12/24 14:16:18 msaitoh Exp $ */
/*
* Copyright (c) 2007 Nicolas Joly
@@ -35,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: spdmem.c,v 1.19 2015/12/08 02:09:23 pgoyette Exp $");
+__KERNEL_RCSID(0, "$NetBSD: spdmem.c,v 1.20 2015/12/24 14:16:18 msaitoh Exp $");
#include <sys/param.h>
#include <sys/device.h>
@@ -77,7 +77,11 @@ static const char* const spdmem_basic_ty
"DDR2 SDRAM FB",
"DDR2 SDRAM FB Probe",
"DDR3 SDRAM",
- "DDR4 SDRAM"
+ "DDR4 SDRAM",
+ "unknown",
+ "DDR4E SDRAM",
+ "LPDDR3 SDRAM",
+ "LPDDR4 SDRAM"
};
static const char* const spdmem_ddr4_module_types[] = {
@@ -382,6 +386,18 @@ spdmem_common_attach(struct spdmem_softc
}
strlcpy(sc->sc_type, type, SPDMEM_TYPE_MAXLEN);
+
+ if (s->sm_type == SPDMEM_MEMTYPE_DDR4SDRAM) {
+ /*
+ * The latest spec (DDR4 SPD Document Release 3) defines
+ * NVDIMM Hybrid only.
+ */
+ if ((s->sm_ddr4.ddr4_hybrid)
+ && (s->sm_ddr4.ddr4_hybrid_media == 1))
+ strlcat(sc->sc_type, " NVDIMM hybrid",
+ SPDMEM_TYPE_MAXLEN);
+ }
+
if (node != NULL)
sysctl_createv(&sc->sc_sysctl_log, 0, NULL, NULL,
0,
@@ -888,18 +904,17 @@ decode_ddr4(const struct sysctlnode *nod
* hard-code them for now.
*/
cycle_time = __DDR4_VALUE(tCKAVGmin);
- aprint_normal("%d.%03dns cycle time (%dMHz), ", cycle_time/1000,
- cycle_time % 1000, 1000000 / cycle_time);
-
decode_size_speed(self, node, dimm_size, cycle_time, 2,
1 << (s->sm_ddr4.ddr4_primary_bus_width + 3),
TRUE, "PC4", 0);
aprint_verbose_dev(self,
- "%d rows, %d cols, %d banks, %d bank groups\n",
+ "%d rows, %d cols, %d banks, %d bank groups, "
+ "%d.%03dns cycle time\n",
s->sm_ddr4.ddr4_rows + 9, s->sm_ddr4.ddr4_cols + 12,
1 << (2 + s->sm_ddr4.ddr4_logbanks),
- 1 << s->sm_ddr4.ddr4_bankgroups);
+ 1 << s->sm_ddr4.ddr4_bankgroups,
+ cycle_time / 1000, cycle_time % 1000);
/*
* Note that the ddr4_xxx_ftb fields are actually signed offsets from
Index: src/sys/dev/ic/spdmemreg.h
diff -u src/sys/dev/ic/spdmemreg.h:1.3 src/sys/dev/ic/spdmemreg.h:1.4
--- src/sys/dev/ic/spdmemreg.h:1.3 Mon Apr 20 02:55:14 2015
+++ src/sys/dev/ic/spdmemreg.h Thu Dec 24 14:16:18 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: spdmemreg.h,v 1.3 2015/04/20 02:55:14 pgoyette Exp $ */
+/* $NetBSD: spdmemreg.h,v 1.4 2015/12/24 14:16:18 msaitoh Exp $ */
/*
* Copyright (c) 2007 Paul Goyette
@@ -41,6 +41,9 @@
#define SPDMEM_MEMTYPE_FBDIMM_PROBE 0x0A
#define SPDMEM_MEMTYPE_DDR3SDRAM 0x0B
#define SPDMEM_MEMTYPE_DDR4SDRAM 0x0C
+#define SPDMEM_MEMTYPE_DDR4ESDRAM 0x0E
+#define SPDMEM_MEMTYPE_LPDDR3SDRAM 0x0F
+#define SPDMEM_MEMTYPE_LPDDR4SDRAM 0x10
#define SPDMEM_MEMTYPE_RAMBUS 0x11
#define SPDMEM_MEMTYPE_DIRECTRAMBUS 0x01
Index: src/sys/dev/ic/spdmemvar.h
diff -u src/sys/dev/ic/spdmemvar.h:1.9 src/sys/dev/ic/spdmemvar.h:1.10
--- src/sys/dev/ic/spdmemvar.h:1.9 Mon Dec 7 09:41:37 2015
+++ src/sys/dev/ic/spdmemvar.h Thu Dec 24 14:16:18 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: spdmemvar.h,v 1.9 2015/12/07 09:41:37 mlelstv Exp $ */
+/* $NetBSD: spdmemvar.h,v 1.10 2015/12/24 14:16:18 msaitoh Exp $ */
/*
* Copyright (c) 2007 Paul Goyette
@@ -719,7 +719,8 @@ struct spdmem_ddr4 { /* Dual Data Rat
uint8_t ddr4_type;
SPD_BITFIELD( \
uint8_t ddr4_mod_type:4, \
- uint8_t ddr4_unused1:4, , \
+ uint8_t ddr4_hybrid_media:3, \
+ uint8_t ddr4_hybrid:1, \
);
SPD_BITFIELD( \
/* capacity is offset by 28: 0 = 256M, 1 = 512M, ... */ \
@@ -813,7 +814,12 @@ struct spdmem_ddr4 { /* Dual Data Rat
uint8_t ddr4_tRRD_Smin_mtb;
uint8_t ddr4_tRRD_Lmin_mtb;
uint8_t ddr4_tCCD_Lmin_mtb;
- uint8_t ddr4_unused15[19];
+ uint8_t ddr4_tWR_min_msb;
+ uint8_t ddr4_tWR_min_mtb;
+ uint8_t ddr4_tWTR_min;
+ uint8_t ddr4_tWTR_Smin_mtb;
+ uint8_t ddr4_tWTR_Lmin_mtb;
+ uint8_t ddr4_unused15[14];
uint8_t ddr4_connector_map[18];
uint8_t ddr4_unused16[39];
uint8_t ddr4_tCCD_Lmin_ftb;
@@ -882,7 +888,7 @@ struct spdmem {
#define sm_refresh sm_fpm.fpm_refresh
#define sm_selfrefresh sm_fpm.fpm_selfrefresh
-#define SPDMEM_TYPE_MAXLEN 24
+#define SPDMEM_TYPE_MAXLEN 40
struct spdmem_softc {
uint8_t (*sc_read)(struct spdmem_softc *, uint16_t);
