Module Name: src
Committed By: matt
Date: Mon Jul 11 16:18:56 UTC 2016
Modified Files:
src/sys/arch/arc/arc: bus_space_sparse.c c_nec_eisa.c
src/sys/arch/emips/emips: interrupt.c xilinx_ml40x.c xs_bee3.c
src/sys/arch/evbmips/cavium: machdep.c
src/sys/arch/evbmips/gdium: machdep.c
src/sys/arch/evbmips/malta: machdep.c
src/sys/arch/hpcmips/hpcmips: bus_space.c
src/sys/arch/hpcmips/tx: tx3912video.c
Log Message:
Use pmap_kenter flags to create cached/uncached entries.
#include <mips/locore.h> when appropriate
To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/arc/arc/bus_space_sparse.c
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/arc/arc/c_nec_eisa.c
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/emips/emips/interrupt.c
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/emips/emips/xilinx_ml40x.c
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/emips/emips/xs_bee3.c
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/evbmips/cavium/machdep.c
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/evbmips/gdium/machdep.c
cvs rdiff -u -r1.44 -r1.45 src/sys/arch/evbmips/malta/machdep.c
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/hpcmips/hpcmips/bus_space.c
cvs rdiff -u -r1.44 -r1.45 src/sys/arch/hpcmips/tx/tx3912video.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arc/arc/bus_space_sparse.c
diff -u src/sys/arch/arc/arc/bus_space_sparse.c:1.18 src/sys/arch/arc/arc/bus_space_sparse.c:1.19
--- src/sys/arch/arc/arc/bus_space_sparse.c:1.18 Fri Jul 1 19:28:00 2011
+++ src/sys/arch/arc/arc/bus_space_sparse.c Mon Jul 11 16:18:55 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_space_sparse.c,v 1.18 2011/07/01 19:28:00 dyoung Exp $ */
+/* $NetBSD: bus_space_sparse.c,v 1.19 2016/07/11 16:18:55 matt Exp $ */
/* NetBSD: bus_machdep.c,v 1.1 2000/01/26 18:48:00 drochner Exp */
/*-
@@ -39,42 +39,21 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bus_space_sparse.c,v 1.18 2011/07/01 19:28:00 dyoung Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bus_space_sparse.c,v 1.19 2016/07/11 16:18:55 matt Exp $");
#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/malloc.h>
+#include <sys/bus.h>
#include <sys/extent.h>
+#include <sys/malloc.h>
+#include <sys/systm.h>
#include <uvm/uvm_extern.h>
-#include <mips/cpuregs.h>
+#include <mips/locore.h>
#include <mips/pte.h>
-#include <sys/bus.h>
-
extern paddr_t kvtophys(vaddr_t); /* XXX */
-static void arc_kseg2_make_cacheable(vaddr_t vaddr, vsize_t size);
-
-static void
-arc_kseg2_make_cacheable(vaddr_t vaddr, vsize_t size)
-{
- vaddr_t start, end;
- pt_entry_t *pte;
- uint32_t entry, mask;
-
- start = mips_trunc_page(vaddr);
- end = mips_round_page(vaddr + size);
- mask = ~(CPUISMIPS3 ? MIPS3_PG_UNCACHED : MIPS1_PG_N);
- for (; start < end; start += PAGE_SIZE) {
- pte = kvtopte(start);
- entry = pte->pt_entry & mask;
- pte->pt_entry &= entry;
- tlb_update(start, entry);
- }
-}
-
void
arc_sparse_bus_space_init(bus_space_tag_t bst, const char *name, paddr_t paddr,
bus_addr_t start, bus_size_t size)
@@ -96,7 +75,9 @@ arc_sparse_bus_space_compose_handle(bus_
* Since all buses can be linearly mappable, we don't have to check
* BUS_SPACE_MAP_LINEAR and BUS_SPACE_MAP_PREFETCHABLE.
*/
- int cacheable = (flags & BUS_SPACE_MAP_CACHEABLE);
+ const u_int pmap_flags = (flags & BUS_SPACE_MAP_CACHEABLE)
+ ? PMAP_WRITE_BACK
+ : 0;
/*
* XXX - `bst->bs_pbase' must be page aligned,
@@ -111,22 +92,20 @@ arc_sparse_bus_space_compose_handle(bus_
MIPS_PHYS_TO_KSEG0(start) :
MIPS_PHYS_TO_KSEG1(start));
} else {
- vaddr_t va,
- vaddr = uvm_km_alloc(kernel_map, (vsize_t)(end - start), 0,
- UVM_KMF_VAONLY | UVM_KMF_NOWAIT);
+ vaddr_t vaddr = uvm_km_alloc(kernel_map, (vsize_t)(end - start),
+ 0, UVM_KMF_VAONLY | UVM_KMF_NOWAIT);
if (vaddr == 0)
panic("arc_sparse_bus_space_compose_handle: "
"cannot allocate KVA 0x%llx..0x%llx",
start, end);
- for (va = vaddr; start < end;
- start += PAGE_SIZE, va += PAGE_SIZE)
- pmap_kenter_pa(va, start,
- VM_PROT_READ|VM_PROT_WRITE, 0);
+ for (vaddr_t va = vaddr; start < end;
+ start += PAGE_SIZE, va += PAGE_SIZE) {
+ pmap_kenter_pa(va, start, VM_PROT_READ|VM_PROT_WRITE,
+ pmap_flags);
+ }
pmap_update(pmap_kernel());
vaddr += (offset & PGOFSET);
- if (cacheable)
- arc_kseg2_make_cacheable(vaddr, size);
*bshp = vaddr;
}
return 0;
Index: src/sys/arch/arc/arc/c_nec_eisa.c
diff -u src/sys/arch/arc/arc/c_nec_eisa.c:1.16 src/sys/arch/arc/arc/c_nec_eisa.c:1.17
--- src/sys/arch/arc/arc/c_nec_eisa.c:1.16 Sun Feb 20 07:52:42 2011
+++ src/sys/arch/arc/arc/c_nec_eisa.c Mon Jul 11 16:18:55 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: c_nec_eisa.c,v 1.16 2011/02/20 07:52:42 matt Exp $ */
+/* $NetBSD: c_nec_eisa.c,v 1.17 2016/07/11 16:18:55 matt Exp $ */
/*-
* Copyright (c) 2003 Izumi Tsutsui. All rights reserved.
@@ -55,7 +55,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: c_nec_eisa.c,v 1.16 2011/02/20 07:52:42 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: c_nec_eisa.c,v 1.17 2016/07/11 16:18:55 matt Exp $");
#define __INTR_PRIVATE
#include <sys/param.h>
@@ -66,6 +66,8 @@ __KERNEL_RCSID(0, "$NetBSD: c_nec_eisa.c
#include <uvm/uvm_extern.h>
+#include <mips/locore.h>
+
#include <machine/autoconf.h>
#include <machine/pio.h>
#include <machine/platform.h>
Index: src/sys/arch/emips/emips/interrupt.c
diff -u src/sys/arch/emips/emips/interrupt.c:1.5 src/sys/arch/emips/emips/interrupt.c:1.6
--- src/sys/arch/emips/emips/interrupt.c:1.5 Sat Oct 27 17:17:46 2012
+++ src/sys/arch/emips/emips/interrupt.c Mon Jul 11 16:18:56 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: interrupt.c,v 1.5 2012/10/27 17:17:46 chs Exp $ */
+/* $NetBSD: interrupt.c,v 1.6 2016/07/11 16:18:56 matt Exp $ */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.5 2012/10/27 17:17:46 chs Exp $");
+__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.6 2016/07/11 16:18:56 matt Exp $");
#include <sys/param.h>
#include <sys/device.h>
@@ -84,11 +84,11 @@ intr_init(void)
tlb.tlb_hi = INTERRUPT_CONTROLLER_DEFAULT_ADDRESS;
tlb.tlb_lo0 = INTERRUPT_CONTROLLER_DEFAULT_ADDRESS | 0xf02;
- tlb_write_indexed(4, &tlb);
+ tlb_write_entry(4, &tlb);
tlb.tlb_hi = TIMER_DEFAULT_ADDRESS;
tlb.tlb_lo0 = TIMER_DEFAULT_ADDRESS | 0xf02;
- tlb_write_indexed(5, &tlb);
+ tlb_write_entry(5, &tlb);
}
/*
Index: src/sys/arch/emips/emips/xilinx_ml40x.c
diff -u src/sys/arch/emips/emips/xilinx_ml40x.c:1.3 src/sys/arch/emips/emips/xilinx_ml40x.c:1.4
--- src/sys/arch/emips/emips/xilinx_ml40x.c:1.3 Mon Mar 24 20:06:31 2014
+++ src/sys/arch/emips/emips/xilinx_ml40x.c Mon Jul 11 16:18:56 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: xilinx_ml40x.c,v 1.3 2014/03/24 20:06:31 christos Exp $ */
+/* $NetBSD: xilinx_ml40x.c,v 1.4 2016/07/11 16:18:56 matt Exp $ */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: xilinx_ml40x.c,v 1.3 2014/03/24 20:06:31 christos Exp $");
+__KERNEL_RCSID(0, "$NetBSD: xilinx_ml40x.c,v 1.4 2016/07/11 16:18:56 matt Exp $");
#define __INTR_PRIVATE
@@ -122,7 +122,7 @@ xilinx_ml40x_cons_init(void)
tlb.tlb_hi = USART_DEFAULT_ADDRESS;
tlb.tlb_lo0 = USART_DEFAULT_ADDRESS | 0xf02;
- tlb_write_indexed(3, &tlb);
+ tlb_write_entry(3, &tlb);
#endif
dz_ebus_cnsetup(USART_DEFAULT_ADDRESS);
Index: src/sys/arch/emips/emips/xs_bee3.c
diff -u src/sys/arch/emips/emips/xs_bee3.c:1.4 src/sys/arch/emips/emips/xs_bee3.c:1.5
--- src/sys/arch/emips/emips/xs_bee3.c:1.4 Mon Mar 24 20:06:31 2014
+++ src/sys/arch/emips/emips/xs_bee3.c Mon Jul 11 16:18:56 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: xs_bee3.c,v 1.4 2014/03/24 20:06:31 christos Exp $ */
+/* $NetBSD: xs_bee3.c,v 1.5 2016/07/11 16:18:56 matt Exp $ */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: xs_bee3.c,v 1.4 2014/03/24 20:06:31 christos Exp $");
+__KERNEL_RCSID(0, "$NetBSD: xs_bee3.c,v 1.5 2016/07/11 16:18:56 matt Exp $");
#define __INTR_PRIVATE
@@ -119,7 +119,7 @@ xs_bee3_cons_init(void)
tlb.tlb_hi = USART_DEFAULT_ADDRESS;
tlb.tlb_lo0 = USART_DEFAULT_ADDRESS | 0xf02;
- tlb_write_indexed(3, &tlb);
+ tlb_write_entry(3, &tlb);
#endif
dz_ebus_cnsetup(USART_DEFAULT_ADDRESS);
Index: src/sys/arch/evbmips/cavium/machdep.c
diff -u src/sys/arch/evbmips/cavium/machdep.c:1.5 src/sys/arch/evbmips/cavium/machdep.c:1.6
--- src/sys/arch/evbmips/cavium/machdep.c:1.5 Wed Jun 10 22:31:00 2015
+++ src/sys/arch/evbmips/cavium/machdep.c Mon Jul 11 16:18:56 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: machdep.c,v 1.5 2015/06/10 22:31:00 matt Exp $ */
+/* $NetBSD: machdep.c,v 1.6 2016/07/11 16:18:56 matt Exp $ */
/*
* Copyright 2001, 2002 Wasabi Systems, Inc.
@@ -114,7 +114,7 @@
#include "opt_multiprocessor.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.5 2015/06/10 22:31:00 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.6 2016/07/11 16:18:56 matt Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -179,6 +179,8 @@ void mach_init(uint64_t, uint64_t, uint6
struct octeon_config octeon_configuration;
struct octeon_btinfo octeon_btinfo;
+char octeon_nmi_stack[PAGE_SIZE] __section(".data1") __aligned(PAGE_SIZE);
+
/*
* Do all the stuff that locore normally does before calling main().
*/
@@ -192,7 +194,7 @@ mach_init(uint64_t arg0, uint64_t arg1,
mach_init_bss();
KASSERT(MIPS_XKPHYS_P(arg3));
- btinfo_paddr = mips64_ld_a64(arg3 + OCTEON_BTINFO_PADDR_OFFSET);
+ btinfo_paddr = mips3_ld(arg3 + OCTEON_BTINFO_PADDR_OFFSET);
/* Should be in first 256MB segment */
KASSERT(btinfo_paddr < 256 * 1024 * 1024);
@@ -235,6 +237,18 @@ mach_init(uint64_t arg0, uint64_t arg1,
boothowto = RB_AUTOBOOT;
boothowto |= AB_VERBOSE;
+#if 0
+ curcpu()->ci_nmi_stack = octeon_nmi_stack + sizeof(octeon_nmi_stack) - sizeof(struct kernframe);
+ *(uint64_t *)MIPS_PHYS_TO_KSEG0(0x800) = (intptr_t)octeon_reset_vector;
+ const uint64_t wdog_reg = MIPS_PHYS_TO_XKPHYS_UNCACHED(CIU_WDOG0);
+ uint64_t wdog = mips3_ld(wdog_reg);
+ wdog &= ~(CIU_WDOGX_MODE|CIU_WDOGX_LEN);
+ wdog |= __SHIFTIN(3, CIU_WDOGX_MODE);
+ wdog |= CIU_WDOGX_LEN; // max period
+ mips64_sd_a64(wdog_reg, wdog);
+ printf("Watchdog enabled!\n");
+#endif
+
#if defined(DDB)
if (boothowto & RB_KDB)
Debugger();
Index: src/sys/arch/evbmips/gdium/machdep.c
diff -u src/sys/arch/evbmips/gdium/machdep.c:1.18 src/sys/arch/evbmips/gdium/machdep.c:1.19
--- src/sys/arch/evbmips/gdium/machdep.c:1.18 Mon Feb 1 17:37:39 2016
+++ src/sys/arch/evbmips/gdium/machdep.c Mon Jul 11 16:18:56 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: machdep.c,v 1.18 2016/02/01 17:37:39 christos Exp $ */
+/* $NetBSD: machdep.c,v 1.19 2016/07/11 16:18:56 matt Exp $ */
/*
* Copyright 2001, 2002 Wasabi Systems, Inc.
@@ -74,7 +74,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.18 2016/02/01 17:37:39 christos Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.19 2016/07/11 16:18:56 matt Exp $");
#include "opt_ddb.h"
#include "opt_execfmt.h"
@@ -255,7 +255,7 @@ mach_init(int argc, char **argv, char **
/*
* Disable the 2nd PCI window since we don't need it.
*/
- mips3_sd((uint64_t *)MIPS_PHYS_TO_KSEG1(BONITO_REGBASE + 0x158), 0xe);
+ mips3_sd(MIPS_PHYS_TO_KSEG1(BONITO_REGBASE + 0x158), 0xe);
pci_conf_write(&gc->gc_pc, pci_make_tag(&gc->gc_pc, 0, 0, 0), 18, 0);
/*
Index: src/sys/arch/evbmips/malta/machdep.c
diff -u src/sys/arch/evbmips/malta/machdep.c:1.44 src/sys/arch/evbmips/malta/machdep.c:1.45
--- src/sys/arch/evbmips/malta/machdep.c:1.44 Mon Jun 1 22:55:12 2015
+++ src/sys/arch/evbmips/malta/machdep.c Mon Jul 11 16:18:56 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: machdep.c,v 1.44 2015/06/01 22:55:12 matt Exp $ */
+/* $NetBSD: machdep.c,v 1.45 2016/07/11 16:18:56 matt Exp $ */
/*
* Copyright 2001, 2002 Wasabi Systems, Inc.
@@ -74,7 +74,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.44 2015/06/01 22:55:12 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.45 2016/07/11 16:18:56 matt Exp $");
#include "opt_ddb.h"
#include "opt_execfmt.h"
@@ -278,7 +278,7 @@ mach_init(int argc, char **argv, yamon_e
Debugger();
#endif
-#ifdef MULTIPROCESSOR
+#if defined(MULTIPROCESSOR) && 0
/*
* We can never be running on more than one processor but we can dream.
*/
Index: src/sys/arch/hpcmips/hpcmips/bus_space.c
diff -u src/sys/arch/hpcmips/hpcmips/bus_space.c:1.31 src/sys/arch/hpcmips/hpcmips/bus_space.c:1.32
--- src/sys/arch/hpcmips/hpcmips/bus_space.c:1.31 Fri Jan 27 18:52:56 2012
+++ src/sys/arch/hpcmips/hpcmips/bus_space.c Mon Jul 11 16:18:56 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_space.c,v 1.31 2012/01/27 18:52:56 para Exp $ */
+/* $NetBSD: bus_space.c,v 1.32 2016/07/11 16:18:56 matt Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -31,19 +31,20 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bus_space.c,v 1.31 2012/01/27 18:52:56 para Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bus_space.c,v 1.32 2016/07/11 16:18:56 matt Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/malloc.h>
#include <sys/extent.h>
+#include <sys/bus.h>
#include <uvm/uvm_extern.h>
#include <mips/cache.h>
#include <mips/locore.h>
#include <mips/pte.h>
-#include <machine/bus.h>
+
#include <machine/bus_space_hpcmips.h>
#ifdef BUS_SPACE_DEBUG
@@ -224,39 +225,37 @@ hpcmips_init_bus_space(struct bus_space_
}
}
+static bool
+mips_pte_cachechange(struct pmap *pmap, vaddr_t sva, vaddr_t eva,
+ pt_entry_t *ptep, uintptr_t flags)
+{
+ mips_dcache_wbinv_range(sva, eva - sva);
+
+ for (; sva < eva; sva += PAGE_SIZE) {
+ pt_entry_t pte = pte_cached_change(*ptep, flags);
+ /*
+ * Update the same virtual address entry.
+ */
+ *ptep = pte;
+ tlb_update_addr(sva, KERNEL_PID, pte, 0);
+ }
+
+ return false;
+}
+
bus_space_handle_t
__hpcmips_cacheable(struct bus_space_tag_hpcmips *t, bus_addr_t bpa,
bus_size_t size, int cacheable)
{
- vaddr_t va, endva;
- pt_entry_t *pte;
- u_int32_t opte, npte;
-
if (t->base >= MIPS_KSEG2_START) {
- va = mips_trunc_page(bpa);
- endva = mips_round_page(bpa + size);
- npte = CPUISMIPS3 ? MIPS3_PG_UNCACHED : MIPS1_PG_N;
-
- mips_dcache_wbinv_range(va, endva - va);
-
- for (; va < endva; va += PAGE_SIZE) {
- pte = kvtopte(va);
- opte = pte->pt_entry;
- if (cacheable) {
- opte &= ~npte;
- } else {
- opte |= npte;
- }
- pte->pt_entry = opte;
- /*
- * Update the same virtual address entry.
- */
- tlb_update(va, opte);
- }
- return (bpa);
+ const vaddr_t sva = mips_trunc_page(bpa);
+ const vaddr_t eva = mips_round_page(bpa + size);
+ pmap_pte_process(pmap_kernel(), sva, eva,
+ mips_pte_cachechange, cacheable);
+ return bpa;
}
- return (cacheable ? MIPS_PHYS_TO_KSEG0(bpa) : MIPS_PHYS_TO_KSEG1(bpa));
+ return cacheable ? MIPS_PHYS_TO_KSEG0(bpa) : MIPS_PHYS_TO_KSEG1(bpa);
}
/* ARGSUSED */
Index: src/sys/arch/hpcmips/tx/tx3912video.c
diff -u src/sys/arch/hpcmips/tx/tx3912video.c:1.44 src/sys/arch/hpcmips/tx/tx3912video.c:1.45
--- src/sys/arch/hpcmips/tx/tx3912video.c:1.44 Sat Jul 9 06:49:03 2016
+++ src/sys/arch/hpcmips/tx/tx3912video.c Mon Jul 11 16:18:56 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: tx3912video.c,v 1.44 2016/07/09 06:49:03 skrll Exp $ */
+/* $NetBSD: tx3912video.c,v 1.45 2016/07/11 16:18:56 matt Exp $ */
/*-
* Copyright (c) 1999-2002 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tx3912video.c,v 1.44 2016/07/09 06:49:03 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tx3912video.c,v 1.45 2016/07/11 16:18:56 matt Exp $");
#define TX3912VIDEO_DEBUG
@@ -52,6 +52,8 @@ __KERNEL_RCSID(0, "$NetBSD: tx3912video.
#include <machine/bootinfo.h>
#include <machine/config_hook.h>
+#include <mips/locore.h>
+
#include <hpcmips/tx/tx39var.h>
#include <hpcmips/tx/tx3912videovar.h>
#include <hpcmips/tx/tx3912videoreg.h>
