Module Name: xsrc
Committed By: macallan
Date: Sat Aug 27 03:46:07 UTC 2016
Modified Files:
xsrc/external/mit/xf86-video-chips/dist/src: ct_cursor.c ct_driver.c
ct_video.c
Log Message:
make this work in shark
needs testing on other hardware
To generate a diff of this commit:
cvs rdiff -u -r1.1.1.3 -r1.2 \
xsrc/external/mit/xf86-video-chips/dist/src/ct_cursor.c
cvs rdiff -u -r1.21 -r1.22 \
xsrc/external/mit/xf86-video-chips/dist/src/ct_driver.c
cvs rdiff -u -r1.1.1.5 -r1.2 \
xsrc/external/mit/xf86-video-chips/dist/src/ct_video.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: xsrc/external/mit/xf86-video-chips/dist/src/ct_cursor.c
diff -u xsrc/external/mit/xf86-video-chips/dist/src/ct_cursor.c:1.1.1.3 xsrc/external/mit/xf86-video-chips/dist/src/ct_cursor.c:1.2
--- xsrc/external/mit/xf86-video-chips/dist/src/ct_cursor.c:1.1.1.3 Sun Jun 2 07:24:56 2013
+++ xsrc/external/mit/xf86-video-chips/dist/src/ct_cursor.c Sat Aug 27 03:46:07 2016
@@ -45,6 +45,7 @@
#include "ct_driver.h"
/* Sync function, maybe this should check infoRec->NeedToSync before syncing */
+#ifdef HAVE_XAA_H
#define CURSOR_SYNC(pScrn) \
if (IS_HiQV(cPtr)) { \
CHIPSHiQVSync(pScrn); \
@@ -55,6 +56,9 @@
CHIPSMMIOSync(pScrn); \
} \
}
+#else
+#define CURSOR_SYNC(pScrn)
+#endif
/* Swing your cursor bytes round and round... yeehaw! */
#if X_BYTE_ORDER == X_BIG_ENDIAN
Index: xsrc/external/mit/xf86-video-chips/dist/src/ct_driver.c
diff -u xsrc/external/mit/xf86-video-chips/dist/src/ct_driver.c:1.21 xsrc/external/mit/xf86-video-chips/dist/src/ct_driver.c:1.22
--- xsrc/external/mit/xf86-video-chips/dist/src/ct_driver.c:1.21 Sat Aug 20 21:50:44 2016
+++ xsrc/external/mit/xf86-video-chips/dist/src/ct_driver.c Sat Aug 27 03:46:07 2016
@@ -75,6 +75,7 @@
/* All drivers should typically include these */
#include "xf86.h"
#include "xf86_OSproc.h"
+#include "xf86Priv.h"
/* Everything using inb/outb, etc needs "compiler.h" */
#include "compiler.h"
@@ -1363,7 +1364,13 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int
return FALSE;
hwp = VGAHWPTR(pScrn);
+#if defined(__arm__)
+ vgaHWSetMmioFuncs(hwp, (CARD8 *)IOPortBase, 0);
+#elif defined(__powerpc__)
+ vgaHWSetMmioFuncs(hwp, ioBase, 0);
+#else
vgaHWSetStdFuncs(hwp);
+#endif
vgaHWGetIOBase(hwp);
#if GET_ABI_MAJOR(ABI_VIDEODRV_VERSION) < 12
cPtr->PIOBase = hwp->PIOOffset;
@@ -1843,8 +1850,15 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int
xf86SetDDCproperties(pScrn,pMon);
}
}
+/*
+ * XXX
+ * this takes forever
+ * do halfway modern monitors even support ddc1?
+ */
+#if 0
if (!ddc_done)
chips_ddc1(pScrn);
+#endif
}
/*test STN / TFT */
@@ -3400,8 +3414,8 @@ chipsPreInit655xx(ScrnInfoPtr pScrn, int
if (cPtr->ClockType & TYPE_PROGRAMMABLE) {
pScrn->numClocks = NoClocks;
- SaveClk->Clock = ((cPtr->PanelType & ChipsLCDProbed) ?
- LCD_TEXT_CLK_FREQ : CRT_TEXT_CLK_FREQ);
+ SaveClk->Clock = ((cPtr->PanelType & ChipsLCDProbed) ?
+ LCD_TEXT_CLK_FREQ : CRT_TEXT_CLK_FREQ);
xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Using programmable clocks\n");
} else { /* TYPE_PROGRAMMABLE */
SaveClk->Clock = chipsGetHWClock(pScrn);
@@ -3626,7 +3640,11 @@ CHIPSLeaveVT(VT_FUNC_ARGS_DECL)
} else {
chipsHWCursorOff(cPtr, pScrn);
chipsRestore(pScrn, &(VGAHWPTR(pScrn))->SavedReg, &cPtr->SavedReg,
+#ifdef AVOID_VGAHW
+ FALSE);
+#else
TRUE);
+#endif
chipsLock(pScrn);
}
}
@@ -3779,9 +3797,11 @@ CHIPSScreenInit(SCREEN_INIT_ARGS_DECL)
hwp = VGAHWPTR(pScrn);
hwp->MapSize = 0x10000; /* Standard 64k VGA window */
+#ifndef AVOID_VGAHW
/* Map the VGA memory */
if (!vgaHWMapMem(pScrn))
return FALSE;
+#endif
/* Map the Chips memory and possible MMIO areas */
if (!chipsMapMem(pScrn))
@@ -4176,6 +4196,7 @@ CHIPSScreenInit(SCREEN_INIT_ARGS_DECL)
xf86InitFBManager(pScreen, &AvailFBArea);
}
+#ifdef HAVE_XAA_H
if (cPtr->Flags & ChipsAccelSupport) {
if (IS_HiQV(cPtr)) {
CHIPSHiQVAccelInit(pScreen);
@@ -4185,7 +4206,7 @@ CHIPSScreenInit(SCREEN_INIT_ARGS_DECL)
CHIPSAccelInit(pScreen);
}
}
-
+#endif
xf86SetBackingStore(pScreen);
#ifdef ENABLE_SILKEN_MOUSE
xf86SetSilkenMouse(pScreen);
@@ -4393,7 +4414,11 @@ CHIPSCloseScreen(CLOSE_SCREEN_ARGS_DECL)
} else {
chipsHWCursorOff(cPtr, pScrn);
chipsRestore(pScrn, &(VGAHWPTR(pScrn))->SavedReg, &cPtr->SavedReg,
+#ifdef AVOID_VGAHW
+ FALSE);
+#else
TRUE);
+#endif
chipsLock(pScrn);
}
chipsUnmapMem(pScrn);
@@ -5128,8 +5153,11 @@ chipsSave(ScrnInfoPtr pScrn, vgaRegPtr V
tmp = cPtr->readXR(cPtr, 0x02);
cPtr->writeXR(cPtr, 0x02, tmp & ~0x18);
/* get generic registers */
+#ifdef AVOID_VGAHW
+ vgaHWSave(pScrn, VgaSave, VGA_SR_CMAP | VGA_SR_MODE);
+#else
vgaHWSave(pScrn, VgaSave, VGA_SR_ALL);
-
+#endif
/* save clock */
chipsClockSave(pScrn, &ChipsSave->Clock);
Index: xsrc/external/mit/xf86-video-chips/dist/src/ct_video.c
diff -u xsrc/external/mit/xf86-video-chips/dist/src/ct_video.c:1.1.1.5 xsrc/external/mit/xf86-video-chips/dist/src/ct_video.c:1.2
--- xsrc/external/mit/xf86-video-chips/dist/src/ct_video.c:1.1.1.5 Sun Jun 2 07:24:57 2013
+++ xsrc/external/mit/xf86-video-chips/dist/src/ct_video.c Sat Aug 27 03:46:07 2016
@@ -175,8 +175,10 @@ CHIPSResetVideo(ScrnInfoPtr pScrn)
unsigned char mr3c;
int red, green, blue;
+#ifdef HAVE_XAA_H
if (cPtr->Flags & ChipsAccelSupport)
CHIPSHiQVSync(pScrn);
+#endif
mr3c = cPtr->readMR(cPtr, 0x3C);
cPtr->writeMR(cPtr, 0x3C, (mr3c | 0x6));
@@ -288,8 +290,10 @@ CHIPSStopVideo(ScrnInfoPtr pScrn, pointe
unsigned char mr3c, tmp;
REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
+#ifdef HAVE_XAA_H
if (cPtr->Flags & ChipsAccelSupport)
CHIPSHiQVSync(pScrn);
+#endif
if(shadow) {
if(pPriv->videoStatus & CLIENT_VIDEO_ON) {
mr3c = cPtr->readMR(cPtr, 0x3C);
@@ -321,8 +325,10 @@ CHIPSSetPortAttribute(
CHIPSPortPrivPtr pPriv = (CHIPSPortPrivPtr)data;
CHIPSPtr cPtr = CHIPSPTR(pScrn);
+#ifdef HAVE_XAA_H
if (cPtr->Flags & ChipsAccelSupport)
CHIPSHiQVSync(pScrn);
+#endif
if(attribute == xvColorKey) {
int red, green, blue;
pPriv->colorKey = value;
@@ -531,10 +537,11 @@ CHIPSDisplayVideo(
int buffer = pPriv->currentBuffer;
Bool dblscan = (pScrn->currentMode->Flags & V_DBLSCAN) == V_DBLSCAN;
int val;
-
+
+#ifdef HAVE_XAA_H
if (cPtr->Flags & ChipsAccelSupport)
CHIPSHiQVSync(pScrn);
-
+#endif
tmp = cPtr->readXR(cPtr, 0xD0);
cPtr->writeXR(cPtr, 0xD0, (tmp | 0x10));
@@ -639,8 +646,10 @@ CHIPSDisplayVideo(
tmp = cPtr->readMR(cPtr, 0x3C);
cPtr->writeMR(cPtr, 0x3C, (tmp | 0x7));
+#ifdef HAVE_XAA_H
if (cPtr->Flags & ChipsAccelSupport)
CHIPSHiQVSync(pScrn);
+#endif
}
static int
@@ -820,8 +829,10 @@ CHIPSVideoTimerCallback(ScrnInfoPtr pScr
if(pPriv->videoStatus & TIMER_MASK) {
if(pPriv->videoStatus & OFF_TIMER) {
if(pPriv->offTime < time) {
+#ifdef HAVE_XAA_H
if (cPtr->Flags & ChipsAccelSupport)
CHIPSHiQVSync(pScrn);
+#endif
mr3c = cPtr->readMR(cPtr, 0x3C);
cPtr->writeMR(cPtr, 0x3C, (mr3c & 0xFE));
pPriv->videoStatus = FREE_TIMER;
