Module Name: src
Committed By: maxv
Date: Sun Nov 13 12:38:14 UTC 2016
Modified Files:
src/sys/arch/i386/i386: vector.S
Log Message:
The reason we are not using INTRENTRY here is because this interrupt goes
through a task gate that points to a TSS entry in the GDT, and therefore
the GPRs are saved in the TSS by the hardware itself. Explain it, otherwise
it easily looks buggy.
To generate a diff of this commit:
cvs rdiff -u -r1.66 -r1.67 src/sys/arch/i386/i386/vector.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/i386/i386/vector.S
diff -u src/sys/arch/i386/i386/vector.S:1.66 src/sys/arch/i386/i386/vector.S:1.67
--- src/sys/arch/i386/i386/vector.S:1.66 Sun Oct 16 10:38:49 2016
+++ src/sys/arch/i386/i386/vector.S Sun Nov 13 12:38:14 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: vector.S,v 1.66 2016/10/16 10:38:49 maxv Exp $ */
+/* $NetBSD: vector.S,v 1.67 2016/11/13 12:38:14 maxv Exp $ */
/*
* Copyright 2002 (c) Wasabi Systems, Inc.
@@ -65,7 +65,7 @@
*/
#include <machine/asm.h>
-__KERNEL_RCSID(0, "$NetBSD: vector.S,v 1.66 2016/10/16 10:38:49 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: vector.S,v 1.67 2016/11/13 12:38:14 maxv Exp $");
#include "opt_ddb.h"
#include "opt_multiprocessor.h"
@@ -194,6 +194,10 @@ IDTVEC(intr_lapic_tlb)
IDTVEC_END(intr_lapic_tlb)
#if defined(DDB)
+/*
+ * No need to use INTRENTRY, since we were brought here through a task-gate
+ * which triggered a hardware context switch and saved the GPRs in the TSS.
+ */
IDTVEC(intrddbipi)
1:
str %ax
