Module Name: src
Committed By: macallan
Date: Thu Nov 17 23:46:52 UTC 2016
Modified Files:
src/sys/arch/sgimips/sgimips: cpu.c
Log Message:
KASSERT that MIPS_SR_KX is set when entering interrupt handler in !o32
To generate a diff of this commit:
cvs rdiff -u -r1.26 -r1.27 src/sys/arch/sgimips/sgimips/cpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/sgimips/sgimips/cpu.c
diff -u src/sys/arch/sgimips/sgimips/cpu.c:1.26 src/sys/arch/sgimips/sgimips/cpu.c:1.27
--- src/sys/arch/sgimips/sgimips/cpu.c:1.26 Sun Feb 20 07:59:51 2011
+++ src/sys/arch/sgimips/sgimips/cpu.c Thu Nov 17 23:46:52 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.26 2011/02/20 07:59:51 matt Exp $ */
+/* $NetBSD: cpu.c,v 1.27 2016/11/17 23:46:52 macallan Exp $ */
/*
* Copyright (c) 2000 Soren S. Jorvang
@@ -35,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.26 2011/02/20 07:59:51 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.27 2016/11/17 23:46:52 macallan Exp $");
#include <sys/param.h>
#include <sys/device.h>
@@ -109,6 +109,11 @@ cpu_intr(int ppl, vaddr_t pc, uint32_t s
curcpu()->ci_data.cpu_nintr++;
+#if !defined(__mips_o32)
+ KASSERTMSG(mips_cp0_status_read() & MIPS_SR_KX,
+ "pc %"PRIxVADDR ", status %x\n", pc, status);
+#endif
+
(void)(*platform.watchdog_reset)();
while (ppl < (ipl = splintr(&pending))) {
