Module Name: src
Committed By: msaitoh
Date: Mon Feb 27 14:13:57 UTC 2017
Modified Files:
src/sys/dev/pci: agp.c agpreg.h pci_subr.c pcireg.h
src/sys/sys: agpio.h
Log Message:
Decode AGP capability.
To generate a diff of this commit:
cvs rdiff -u -r1.83 -r1.84 src/sys/dev/pci/agp.c
cvs rdiff -u -r1.23 -r1.24 src/sys/dev/pci/agpreg.h
cvs rdiff -u -r1.160 -r1.161 src/sys/dev/pci/pci_subr.c
cvs rdiff -u -r1.120 -r1.121 src/sys/dev/pci/pcireg.h
cvs rdiff -u -r1.11 -r1.12 src/sys/sys/agpio.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/agp.c
diff -u src/sys/dev/pci/agp.c:1.83 src/sys/dev/pci/agp.c:1.84
--- src/sys/dev/pci/agp.c:1.83 Fri Jul 25 08:10:38 2014
+++ src/sys/dev/pci/agp.c Mon Feb 27 14:13:56 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: agp.c,v 1.83 2014/07/25 08:10:38 dholland Exp $ */
+/* $NetBSD: agp.c,v 1.84 2017/02/27 14:13:56 msaitoh Exp $ */
/*-
* Copyright (c) 2000 Doug Rabson
@@ -65,7 +65,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: agp.c,v 1.83 2014/07/25 08:10:38 dholland Exp $");
+__KERNEL_RCSID(0, "$NetBSD: agp.c,v 1.84 2017/02/27 14:13:56 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -471,9 +471,9 @@ agp_generic_enable(struct agp_softc *sc,
}
tstatus = pci_conf_read(sc->as_pc, sc->as_tag,
- sc->as_capoff + AGP_STATUS);
+ sc->as_capoff + PCI_AGP_STATUS);
mstatus = pci_conf_read(pa.pa_pc, pa.pa_tag,
- capoff + AGP_STATUS);
+ capoff + PCI_AGP_STATUS);
if (AGP_MODE_GET_MODE_3(mode) &&
AGP_MODE_GET_MODE_3(tstatus) &&
@@ -492,9 +492,9 @@ agp_generic_enable_v2(struct agp_softc *
int rq, sba, fw, rate;
tstatus = pci_conf_read(sc->as_pc, sc->as_tag,
- sc->as_capoff + AGP_STATUS);
+ sc->as_capoff + PCI_AGP_STATUS);
mstatus = pci_conf_read(pa->pa_pc, pa->pa_tag,
- capoff + AGP_STATUS);
+ capoff + PCI_AGP_STATUS);
/* Set RQ to the min of mode, tstatus and mstatus */
rq = AGP_MODE_GET_RQ(mode);
@@ -531,8 +531,9 @@ agp_generic_enable_v2(struct agp_softc *
command = AGP_MODE_SET_RATE(command, rate);
command = AGP_MODE_SET_AGP(command, 1);
pci_conf_write(sc->as_pc, sc->as_tag,
- sc->as_capoff + AGP_COMMAND, command);
- pci_conf_write(pa->pa_pc, pa->pa_tag, capoff + AGP_COMMAND, command);
+ sc->as_capoff + PCI_AGP_COMMAND, command);
+ pci_conf_write(pa->pa_pc, pa->pa_tag, capoff + PCI_AGP_COMMAND,
+ command);
return 0;
}
@@ -546,9 +547,9 @@ agp_generic_enable_v3(struct agp_softc *
int rq, sba, fw, rate, arqsz, cal;
tstatus = pci_conf_read(sc->as_pc, sc->as_tag,
- sc->as_capoff + AGP_STATUS);
+ sc->as_capoff + PCI_AGP_STATUS);
mstatus = pci_conf_read(pa->pa_pc, pa->pa_tag,
- capoff + AGP_STATUS);
+ capoff + PCI_AGP_STATUS);
/* Set RQ to the min of mode, tstatus and mstatus */
rq = AGP_MODE_GET_RQ(mode);
@@ -598,8 +599,9 @@ agp_generic_enable_v3(struct agp_softc *
command = AGP_MODE_SET_RATE(command, rate);
command = AGP_MODE_SET_AGP(command, 1);
pci_conf_write(sc->as_pc, sc->as_tag,
- sc->as_capoff + AGP_COMMAND, command);
- pci_conf_write(pa->pa_pc, pa->pa_tag, capoff + AGP_COMMAND, command);
+ sc->as_capoff + PCI_AGP_COMMAND, command);
+ pci_conf_write(pa->pa_pc, pa->pa_tag, capoff + PCI_AGP_COMMAND,
+ command);
return 0;
}
@@ -895,7 +897,7 @@ agp_info_user(struct agp_softc *sc, agp_
info->bridge_id = sc->as_id;
if (sc->as_capoff != 0)
info->agp_mode = pci_conf_read(sc->as_pc, sc->as_tag,
- sc->as_capoff + AGP_STATUS);
+ sc->as_capoff + PCI_AGP_STATUS);
else
info->agp_mode = 0; /* i810 doesn't have real AGP */
info->aper_base = sc->as_apaddr;
@@ -1148,7 +1150,7 @@ agp_get_info(void *devcookie, struct agp
struct agp_softc *sc = devcookie;
info->ai_mode = pci_conf_read(sc->as_pc, sc->as_tag,
- sc->as_capoff + AGP_STATUS);
+ sc->as_capoff + PCI_AGP_STATUS);
info->ai_aperture_base = sc->as_apaddr;
info->ai_aperture_size = sc->as_apsize; /* XXXfvdl inconsistent */
info->ai_memory_allowed = sc->as_maxmem;
Index: src/sys/dev/pci/agpreg.h
diff -u src/sys/dev/pci/agpreg.h:1.23 src/sys/dev/pci/agpreg.h:1.24
--- src/sys/dev/pci/agpreg.h:1.23 Sun May 1 04:22:50 2016
+++ src/sys/dev/pci/agpreg.h Mon Feb 27 14:13:56 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: agpreg.h,v 1.23 2016/05/01 04:22:50 nonaka Exp $ */
+/* $NetBSD: agpreg.h,v 1.24 2017/02/27 14:13:56 msaitoh Exp $ */
/*-
* Copyright (c) 2000 Doug Rabson
@@ -36,9 +36,6 @@
*/
#define AGP_APBASE 0x10
-#define AGP_STATUS 0x4
-#define AGP_COMMAND 0x8
-
/*
* Config registers for Intel AGP chipsets.
*/
Index: src/sys/dev/pci/pci_subr.c
diff -u src/sys/dev/pci/pci_subr.c:1.160 src/sys/dev/pci/pci_subr.c:1.161
--- src/sys/dev/pci/pci_subr.c:1.160 Sun Feb 26 05:41:47 2017
+++ src/sys/dev/pci/pci_subr.c Mon Feb 27 14:13:56 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_subr.c,v 1.160 2017/02/26 05:41:47 msaitoh Exp $ */
+/* $NetBSD: pci_subr.c,v 1.161 2017/02/27 14:13:56 msaitoh Exp $ */
/*
* Copyright (c) 1997 Zubin D. Dittia. All rights reserved.
@@ -40,7 +40,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.160 2017/02/26 05:41:47 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.161 2017/02/27 14:13:56 msaitoh Exp $");
#ifdef _KERNEL_OPT
#include "opt_pci.h"
@@ -1006,10 +1006,52 @@ pci_conf_print_regs(const pcireg_t *regs
printf("\n");
}
+static const char *
+pci_conf_print_agp_calcycle(uint8_t cal)
+{
+
+ switch (cal) {
+ case 0x0:
+ return "4ms";
+ case 0x1:
+ return "16ms";
+ case 0x2:
+ return "64ms";
+ case 0x3:
+ return "256ms";
+ case 0x7:
+ return "Calibration Cycle Not Needed";
+ default:
+ return "(reserved)";
+ }
+}
+
+static void
+pci_conf_print_agp_datarate(pcireg_t reg, bool isagp3)
+{
+ if (isagp3) {
+ /* AGP 3.0 */
+ if (reg & AGP_MODE_V3_RATE_4x)
+ printf("x4");
+ if (reg & AGP_MODE_V3_RATE_8x)
+ printf("x8");
+ } else {
+ /* AGP 2.0 */
+ if (reg & AGP_MODE_V2_RATE_1x)
+ printf("x1");
+ if (reg & AGP_MODE_V2_RATE_2x)
+ printf("x2");
+ if (reg & AGP_MODE_V2_RATE_4x)
+ printf("x4");
+ }
+ printf("\n");
+}
+
static void
pci_conf_print_agp_cap(const pcireg_t *regs, int capoff)
{
pcireg_t rval;
+ bool isagp3;
printf("\n AGP Capabilities Register\n");
@@ -1017,7 +1059,44 @@ pci_conf_print_agp_cap(const pcireg_t *r
printf(" Revision: %d.%d\n",
PCI_CAP_AGP_MAJOR(rval), PCI_CAP_AGP_MINOR(rval));
- /* XXX need more */
+ rval = regs[o2i(capoff + PCI_AGP_STATUS)];
+ printf(" Status register: 0x%04x\n", rval);
+ printf(" RQ: %d\n",
+ (unsigned int)__SHIFTOUT(rval, AGP_MODE_RQ) + 1);
+ printf(" ARQSZ: %d\n",
+ (unsigned int)__SHIFTOUT(rval, AGP_MODE_ARQSZ));
+ printf(" CAL cycle: %s\n",
+ pci_conf_print_agp_calcycle(__SHIFTOUT(rval, AGP_MODE_CAL)));
+ onoff("SBA", rval, AGP_MODE_SBA);
+ onoff("htrans#", rval, AGP_MODE_HTRANS);
+ onoff("Over 4G", rval, AGP_MODE_4G);
+ onoff("Fast Write", rval, AGP_MODE_FW);
+ onoff("AGP 3.0 Mode", rval, AGP_MODE_MODE_3);
+ isagp3 = rval & AGP_MODE_MODE_3;
+ printf(" Data Rate Support: ");
+ pci_conf_print_agp_datarate(rval, isagp3);
+
+ rval = regs[o2i(capoff + PCI_AGP_COMMAND)];
+ printf(" Command register: 0x%08x\n", rval);
+ printf(" PRQ: %d\n",
+ (unsigned int)__SHIFTOUT(rval, AGP_MODE_RQ) + 1);
+ printf(" PARQSZ: %d\n",
+ (unsigned int)__SHIFTOUT(rval, AGP_MODE_ARQSZ));
+ printf(" PCAL cycle: %s\n",
+ pci_conf_print_agp_calcycle(__SHIFTOUT(rval, AGP_MODE_CAL)));
+ onoff("SBA", rval, AGP_MODE_SBA);
+ onoff("AGP", rval, AGP_MODE_AGP);
+ onoff("Over 4G", rval, AGP_MODE_4G);
+ onoff("Fast Write", rval, AGP_MODE_FW);
+ if (isagp3) {
+ printf(" Data Rate Enable: ");
+ /*
+ * The Data Rate Enable bits are used only on 3.0 and the
+ * Command register has no AGP_MODE_MODE_3 bit, so pass the
+ * flag to print correctly.
+ */
+ pci_conf_print_agp_datarate(rval, isagp3);
+ }
}
static const char *
Index: src/sys/dev/pci/pcireg.h
diff -u src/sys/dev/pci/pcireg.h:1.120 src/sys/dev/pci/pcireg.h:1.121
--- src/sys/dev/pci/pcireg.h:1.120 Wed Feb 15 06:53:55 2017
+++ src/sys/dev/pci/pcireg.h Mon Feb 27 14:13:56 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: pcireg.h,v 1.120 2017/02/15 06:53:55 msaitoh Exp $ */
+/* $NetBSD: pcireg.h,v 1.121 2017/02/27 14:13:56 msaitoh Exp $ */
/*
* Copyright (c) 1995, 1996, 1999, 2000
@@ -598,6 +598,26 @@ typedef u_int8_t pci_revision_t;
*/
#define PCI_CAP_AGP_MAJOR(cr) (((cr) >> 20) & 0xf)
#define PCI_CAP_AGP_MINOR(cr) (((cr) >> 16) & 0xf)
+#define PCI_AGP_STATUS 0x04
+#define PCI_AGP_COMMAND 0x08
+/* Definitions for STATUS and COMMAND register bits */
+#define AGP_MODE_RQ __BITS(31, 24)
+#define AGP_MODE_ARQSZ __BITS(15, 13)
+#define AGP_MODE_CAL __BITS(12, 10)
+#define AGP_MODE_SBA __BIT(9)
+#define AGP_MODE_AGP __BIT(8)
+#define AGP_MODE_HTRANS __BIT(6)
+#define AGP_MODE_4G __BIT(5)
+#define AGP_MODE_FW __BIT(4)
+#define AGP_MODE_MODE_3 __BIT(3)
+#define AGP_MODE_RATE __BITS(2, 0)
+#define AGP_MODE_V2_RATE_1x 0x1
+#define AGP_MODE_V2_RATE_2x 0x2
+#define AGP_MODE_V2_RATE_4x 0x4
+#define AGP_MODE_V3_RATE_4x 0x1
+#define AGP_MODE_V3_RATE_8x 0x2
+#define AGP_MODE_V3_RATE_RSVD 0x4
+
/*
* Capability ID: 0x03
Index: src/sys/sys/agpio.h
diff -u src/sys/sys/agpio.h:1.11 src/sys/sys/agpio.h:1.12
--- src/sys/sys/agpio.h:1.11 Sun Sep 6 06:01:02 2015
+++ src/sys/sys/agpio.h Mon Feb 27 14:13:56 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: agpio.h,v 1.11 2015/09/06 06:01:02 dholland Exp $ */
+/* $NetBSD: agpio.h,v 1.12 2017/02/27 14:13:56 msaitoh Exp $ */
/*-
* Copyright (c) 2000 Doug Rabson
@@ -42,30 +42,33 @@
/*
* Macros to manipulate AGP mode words.
*/
-#define AGP_MODE_GET_RQ(x) (((x) & 0xff000000U) >> 24)
-#define AGP_MODE_GET_ARQSZ(x) (((x) & 0x0000e000U) >> 13)
-#define AGP_MODE_GET_CAL(x) (((x) & 0x00001c00U) >> 10)
-#define AGP_MODE_GET_SBA(x) (((x) & 0x00000200U) >> 9)
-#define AGP_MODE_GET_AGP(x) (((x) & 0x00000100U) >> 8)
-#define AGP_MODE_GET_4G(x) (((x) & 0x00000020U) >> 5)
-#define AGP_MODE_GET_FW(x) (((x) & 0x00000010U) >> 4)
-#define AGP_MODE_GET_MODE_3(x) (((x) & 0x00000008U) >> 3)
-#define AGP_MODE_GET_RATE(x) ((x) & 0x00000007U)
-#define AGP_MODE_SET_RQ(x,v) (((x) & ~0xff000000U) | ((v) << 24))
-#define AGP_MODE_SET_ARQSZ(x,v) (((x) & ~0x0000e000U) | ((v) << 13))
-#define AGP_MODE_SET_CAL(x,v) (((x) & ~0x00001c00U) | ((v) << 10))
-#define AGP_MODE_SET_SBA(x,v) (((x) & ~0x00000200U) | ((v) << 9))
-#define AGP_MODE_SET_AGP(x,v) (((x) & ~0x00000100U) | ((v) << 8))
-#define AGP_MODE_SET_4G(x,v) (((x) & ~0x00000020U) | ((v) << 5))
-#define AGP_MODE_SET_FW(x,v) (((x) & ~0x00000010U) | ((v) << 4))
-#define AGP_MODE_SET_MODE_3(x,v) (((x) & ~0x00000008U) | ((v) << 3))
-#define AGP_MODE_SET_RATE(x,v) (((x) & ~0x00000007U) | (v))
-#define AGP_MODE_V2_RATE_1x 0x00000001
-#define AGP_MODE_V2_RATE_2x 0x00000002
-#define AGP_MODE_V2_RATE_4x 0x00000004
-#define AGP_MODE_V3_RATE_4x 0x00000001
-#define AGP_MODE_V3_RATE_8x 0x00000002
-#define AGP_MODE_V3_RATE_RSVD 0x00000004
+#define AGP_MODE_GET_RQ(x) __SHIFTOUT((x), AGP_MODE_RQ)
+#define AGP_MODE_GET_ARQSZ(x) __SHIFTOUT((x), AGP_MODE_ARQSZ)
+#define AGP_MODE_GET_CAL(x) __SHIFTOUT((x), AGP_MODE_CAL)
+#define AGP_MODE_GET_SBA(x) __SHIFTOUT((x), AGP_MODE_SBA)
+#define AGP_MODE_GET_AGP(x) __SHIFTOUT((x), AGP_MODE_AGP)
+#define AGP_MODE_GET_4G(x) __SHIFTOUT((x), AGP_MODE_4G)
+#define AGP_MODE_GET_FW(x) __SHIFTOUT((x), AGP_MODE_FW)
+#define AGP_MODE_GET_MODE_3(x) __SHIFTOUT((x), AGP_MODE_MODE_3)
+#define AGP_MODE_GET_RATE(x) __SHIFTOUT((x), AGP_MODE_RATE)
+#define AGP_MODE_SET_RQ(x, v) (((x) & ~AGP_MODE_RQ) \
+ | __SHIFTIN((v), AGP_MODE_RQ))
+#define AGP_MODE_SET_ARQSZ(x, v) (((x) & ~AGP_MODE_ARQSZ) \
+ | __SHIFTIN((v), AGP_MODE_ARQSZ))
+#define AGP_MODE_SET_CAL(x, v) (((x) & ~AGP_MODE_CAL) \
+ | __SHIFTIN((v), ~AGP_MODE_CAL))
+#define AGP_MODE_SET_SBA(x, v) (((x) & ~AGP_MODE_SBA) \
+ | __SHIFTIN((v), AGP_MODE_SBA))
+#define AGP_MODE_SET_AGP(x, v) (((x) & ~AGP_MODE_AGP) \
+ | __SHIFTIN((v), AGP_MODE_AGP))
+#define AGP_MODE_SET_4G(x, v) (((x) & ~AGP_MODE_4G) \
+ | __SHIFTIN((v), AGP_MODE_4G))
+#define AGP_MODE_SET_FW(x, v) (((x) & ~AGP_MODE_FW) \
+ | __SHIFTIN((v), AGP_MODE_FW))
+#define AGP_MODE_SET_MODE_3(x, v) (((x) & ~AGP_MODE_MODE_3) \
+ | __SHIFTIN((v), AGP_MODE_MODE_3))
+#define AGP_MODE_SET_RATE(x, v) (((x) & ~AGP_MODE_RATE) \
+ | __SHIFTIN((v), AGP_MODE_RATE))
/* compat */
#define AGP_MODE_RATE_1x AGP_MODE_V2_RATE_1x
