Module Name: src
Committed By: chs
Date: Sun Mar 5 16:09:26 UTC 2017
Modified Files:
src/sys/arch/powerpc/powerpc: sig_machdep.c
Log Message:
in cpu_setmcontext(), do not update the TLS register (r2) as part of _UC_CPU.
if _UC_TLSBASE is set, use lwp_setprivate() to update both r2 and the
common field in struct lwp.
To generate a diff of this commit:
cvs rdiff -u -r1.44 -r1.45 src/sys/arch/powerpc/powerpc/sig_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/powerpc/sig_machdep.c
diff -u src/sys/arch/powerpc/powerpc/sig_machdep.c:1.44 src/sys/arch/powerpc/powerpc/sig_machdep.c:1.45
--- src/sys/arch/powerpc/powerpc/sig_machdep.c:1.44 Sun Dec 14 23:49:17 2014
+++ src/sys/arch/powerpc/powerpc/sig_machdep.c Sun Mar 5 16:09:26 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: sig_machdep.c,v 1.44 2014/12/14 23:49:17 chs Exp $ */
+/* $NetBSD: sig_machdep.c,v 1.45 2017/03/05 16:09:26 chs Exp $ */
/*
* Copyright (C) 1995, 1996 Wolfgang Solfrank.
@@ -32,7 +32,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sig_machdep.c,v 1.44 2014/12/14 23:49:17 chs Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sig_machdep.c,v 1.45 2017/03/05 16:09:26 chs Exp $");
#include "opt_ppcarch.h"
#include "opt_altivec.h"
@@ -216,10 +216,17 @@ cpu_setmcontext(struct lwp *l, const mco
pcb->pcb_flags |= gr[_REG_MSR] & (PCB_FE0|PCB_FE1);
#endif
+ /*
+ * R2 is the TLS register so avoid updating it here.
+ */
+
+ __greg_t save_r2 = tf->tf_fixreg[_REG_R2];
(void)memcpy(&tf->tf_fixreg, gr, 32 * sizeof (gr[0]));
+ tf->tf_fixreg[_REG_R2] = save_r2;
tf->tf_cr = gr[_REG_CR];
tf->tf_lr = gr[_REG_LR];
tf->tf_srr0 = gr[_REG_PC];
+
/*
* Accept all user-settable bits without complaint;
* userland should not need to know the machine-specific
@@ -233,6 +240,9 @@ cpu_setmcontext(struct lwp *l, const mco
#endif
}
+ if (flags & _UC_TLSBASE)
+ lwp_setprivate(l, (void *)(uintptr_t)gr[_REG_R2]);
+
#ifdef PPC_HAVE_FPU
/* Restore FPU context, if any. */
if (flags & _UC_FPU)
