CVS commit: src/sys/dev/pci

[SAITOH Masanobu]

Module Name:    src
Committed By:   msaitoh
Date:           Tue May  9 11:17:07 UTC 2017

Modified Files:
        src/sys/dev/pci: pci_subr.c

Log Message:
 A device except Root Complex integrated has a link, so print link related
registers on device except Root Complex Integrated Endpoint and Root Complex
Event Collector.


To generate a diff of this commit:
cvs rdiff -u -r1.179 -r1.180 src/sys/dev/pci/pci_subr.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.


Modified files:

Index: src/sys/dev/pci/pci_subr.c
diff -u src/sys/dev/pci/pci_subr.c:1.179 src/sys/dev/pci/pci_subr.c:1.180
--- src/sys/dev/pci/pci_subr.c:1.179	Thu Apr 27 04:26:12 2017
+++ src/sys/dev/pci/pci_subr.c	Tue May  9 11:17:07 2017
@@ -1,4 +1,4 @@
-/*	$NetBSD: pci_subr.c,v 1.179 2017/04/27 04:26:12 msaitoh Exp $	*/
+/*	$NetBSD: pci_subr.c,v 1.180 2017/05/09 11:17:07 msaitoh Exp $	*/
 
 /*
  * Copyright (c) 1997 Zubin D. Dittia.  All rights reserved.
@@ -40,7 +40,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.179 2017/04/27 04:26:12 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.180 2017/05/09 11:17:07 msaitoh Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_pci.h"
@@ -1648,7 +1648,7 @@ pci_conf_print_pcie_cap(const pcireg_t *
 {
 	pcireg_t reg; /* for each register */
 	pcireg_t val; /* for each bitfield */
-	bool check_link = false;
+	bool check_link = true;
 	bool check_slot = false;
 	bool check_rootport = false;
 	unsigned int pciever;
@@ -1664,15 +1664,12 @@ pci_conf_print_pcie_cap(const pcireg_t *
 	switch ((reg & 0x00f00000) >> 20) {
 	case PCIE_XCAP_TYPE_PCIE_DEV:	/* 0x0 */
 		printf("PCI Express Endpoint device\n");
-		check_link = true;
 		break;
 	case PCIE_XCAP_TYPE_PCI_DEV:	/* 0x1 */
 		printf("Legacy PCI Express Endpoint device\n");
-		check_link = true;
 		break;
 	case PCIE_XCAP_TYPE_ROOT:	/* 0x4 */
 		printf("Root Port of PCI Express Root Complex\n");
-		check_link = true;
 		check_slot = true;
 		check_rootport = true;
 		break;
@@ -1693,10 +1690,12 @@ pci_conf_print_pcie_cap(const pcireg_t *
 		break;
 	case PCIE_XCAP_TYPE_ROOT_INTEP:	/* 0x9 */
 		printf("Root Complex Integrated Endpoint\n");
+		check_link = false;
 		break;
 	case PCIE_XCAP_TYPE_ROOT_EVNTC:	/* 0xa */
-		check_rootport = true;
 		printf("Root Complex Event Collector\n");
+		check_link = false;
+		check_rootport = true;
 		break;
 	default:
 		printf("unknown\n");