CVS commit: src/sys/arch/arm/nvidia

[Jared D. McNeill]

Module Name:    src
Committed By:   jmcneill
Date:           Wed Sep 27 10:19:14 UTC 2017

Modified Files:
        src/sys/arch/arm/nvidia: tegra_pcie.c

Log Message:
enable PHYs


To generate a diff of this commit:
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/arm/nvidia/tegra_pcie.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.


Modified files:

Index: src/sys/arch/arm/nvidia/tegra_pcie.c
diff -u src/sys/arch/arm/nvidia/tegra_pcie.c:1.21 src/sys/arch/arm/nvidia/tegra_pcie.c:1.22
--- src/sys/arch/arm/nvidia/tegra_pcie.c:1.21	Tue Sep 26 16:12:45 2017
+++ src/sys/arch/arm/nvidia/tegra_pcie.c	Wed Sep 27 10:19:13 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_pcie.c,v 1.21 2017/09/26 16:12:45 jmcneill Exp $ */
+/* $NetBSD: tegra_pcie.c,v 1.22 2017/09/27 10:19:13 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2015 Jared D. McNeill <jmcne...@invisible.ca>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_pcie.c,v 1.21 2017/09/26 16:12:45 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_pcie.c,v 1.22 2017/09/27 10:19:13 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -374,13 +374,21 @@ tegra_pcie_reset_port(struct tegra_pcie_
 static void
 tegra_pcie_enable_ports(struct tegra_pcie_softc * const sc)
 {
+	struct fdtbus_phy *phy;
 	const u_int *data;
-	int child, len;
+	int child, len, n;
 	uint32_t val;
 
 	for (child = OF_child(sc->sc_phandle); child; child = OF_peer(child)) {
 		if (!fdtbus_status_okay(child))
 			continue;
+
+		/* Enable PHYs */
+		for (n = 0; (phy = fdtbus_phy_get_index(child, n)) != NULL; n++)
+			if (fdtbus_phy_enable(phy, true) != 0)
+				aprint_error_dev(sc->sc_dev, "couldn't enable %s phy #%d\n",
+				    fdtbus_get_string(child, "name"), n);
+
 		data = fdtbus_get_prop(child, "reg", &len);
 		if (data == NULL || len < 4)
 			continue;
@@ -393,6 +401,7 @@ tegra_pcie_enable_ports(struct tegra_pci
 		bus_space_write_4(sc->sc_bst, sc->sc_bsh_afi, AFI_PEXn_CTRL_REG(index), val);
 
 		tegra_pcie_reset_port(sc, index);
+
 	}
 }