Module Name: src
Committed By: maxv
Date: Tue Oct 17 07:33:44 UTC 2017
Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S locore.S
src/sys/arch/amd64/include: frameasm.h
src/sys/arch/x86/x86: cpu.c
Log Message:
Have the cpu clear PSL_D automatically when entering the kernel via a
syscall. Then, don't clear PSL_D and PSL_AC in the syscall entry point,
they are now both cleared by the cpu (faster). However they still need to
be manually cleared in the interrupt/trap entry points.
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/amd64/amd64/amd64_trap.S
cvs rdiff -u -r1.131 -r1.132 src/sys/arch/amd64/amd64/locore.S
cvs rdiff -u -r1.22 -r1.23 src/sys/arch/amd64/include/frameasm.h
cvs rdiff -u -r1.137 -r1.138 src/sys/arch/x86/x86/cpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.11 src/sys/arch/amd64/amd64/amd64_trap.S:1.12
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.11 Fri Sep 15 17:32:12 2017
+++ src/sys/arch/amd64/amd64/amd64_trap.S Tue Oct 17 07:33:44 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: amd64_trap.S,v 1.11 2017/09/15 17:32:12 maxv Exp $ */
+/* $NetBSD: amd64_trap.S,v 1.12 2017/10/17 07:33:44 maxv Exp $ */
/*
* Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -66,7 +66,7 @@
#if 0
#include <machine/asm.h>
-__KERNEL_RCSID(0, "$NetBSD: amd64_trap.S,v 1.11 2017/09/15 17:32:12 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amd64_trap.S,v 1.12 2017/10/17 07:33:44 maxv Exp $");
#endif
/*
@@ -122,6 +122,8 @@ IDTVEC(trap02)
pushq $T_NMI
subq $TF_REGSIZE,%rsp
INTR_SAVE_GPRS
+ cld
+ callq smap_enable
movw %gs,TF_GS(%rsp)
movw %fs,TF_FS(%rsp)
movw %es,TF_ES(%rsp)
Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.131 src/sys/arch/amd64/amd64/locore.S:1.132
--- src/sys/arch/amd64/amd64/locore.S:1.131 Sat Sep 30 11:43:57 2017
+++ src/sys/arch/amd64/amd64/locore.S Tue Oct 17 07:33:44 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.131 2017/09/30 11:43:57 maxv Exp $ */
+/* $NetBSD: locore.S,v 1.132 2017/10/17 07:33:44 maxv Exp $ */
/*
* Copyright-o-rama!
@@ -1278,6 +1278,7 @@ IDTVEC(syscall)
pushq $2 /* error code */
pushq $T_ASTFLT
subq $TF_REGSIZE,%rsp
+ cld
#endif
INTR_SAVE_GPRS
movw %es,TF_ES(%rsp)
Index: src/sys/arch/amd64/include/frameasm.h
diff -u src/sys/arch/amd64/include/frameasm.h:1.22 src/sys/arch/amd64/include/frameasm.h:1.23
--- src/sys/arch/amd64/include/frameasm.h:1.22 Tue Oct 17 06:58:15 2017
+++ src/sys/arch/amd64/include/frameasm.h Tue Oct 17 07:33:44 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: frameasm.h,v 1.22 2017/10/17 06:58:15 maxv Exp $ */
+/* $NetBSD: frameasm.h,v 1.23 2017/10/17 07:33:44 maxv Exp $ */
#ifndef _AMD64_MACHINE_FRAMEASM_H
#define _AMD64_MACHINE_FRAMEASM_H
@@ -55,9 +55,7 @@
movq %r15,TF_R15(%rsp) ; \
movq %rbp,TF_RBP(%rsp) ; \
movq %rbx,TF_RBX(%rsp) ; \
- movq %rax,TF_RAX(%rsp) ; \
- cld ; \
- callq smap_enable
+ movq %rax,TF_RAX(%rsp)
#define INTR_RESTORE_GPRS \
movq TF_RDI(%rsp),%rdi ; \
@@ -79,6 +77,8 @@
#define INTRENTRY_L(kernel_trap, usertrap) \
subq $TF_REGSIZE,%rsp ; \
INTR_SAVE_GPRS ; \
+ cld ; \
+ callq smap_enable ; \
testb $SEL_UPL,TF_CS(%rsp) ; \
je kernel_trap ; \
usertrap ; \
Index: src/sys/arch/x86/x86/cpu.c
diff -u src/sys/arch/x86/x86/cpu.c:1.137 src/sys/arch/x86/x86/cpu.c:1.138
--- src/sys/arch/x86/x86/cpu.c:1.137 Tue Oct 17 06:58:15 2017
+++ src/sys/arch/x86/x86/cpu.c Tue Oct 17 07:33:44 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.137 2017/10/17 06:58:15 maxv Exp $ */
+/* $NetBSD: cpu.c,v 1.138 2017/10/17 07:33:44 maxv Exp $ */
/*
* Copyright (c) 2000-2012 NetBSD Foundation, Inc.
@@ -62,7 +62,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.137 2017/10/17 06:58:15 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.138 2017/10/17 07:33:44 maxv Exp $");
#include "opt_ddb.h"
#include "opt_mpbios.h" /* for MPDEBUG */
@@ -1048,7 +1048,7 @@ cpu_init_msrs(struct cpu_info *ci, bool
((uint64_t)LSEL(LSYSRETBASE_SEL, SEL_UPL) << 48));
wrmsr(MSR_LSTAR, (uint64_t)Xsyscall);
wrmsr(MSR_CSTAR, (uint64_t)Xsyscall32);
- wrmsr(MSR_SFMASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_AC);
+ wrmsr(MSR_SFMASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D|PSL_AC);
if (full) {
wrmsr(MSR_FSBASE, 0);
