Module Name: src
Committed By: jmcneill
Date: Thu Nov 9 21:50:15 UTC 2017
Modified Files:
src/sys/dev/nand: files.nand nand.c nand.h
Added Files:
src/sys/dev/nand: nand_toshiba.c
Log Message:
Add support for decoding legacy Toshiba TC58NVG2S0H NAND chip params.
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/dev/nand/files.nand
cvs rdiff -u -r1.25 -r1.26 src/sys/dev/nand/nand.c
cvs rdiff -u -r1.16 -r1.17 src/sys/dev/nand/nand.h
cvs rdiff -u -r0 -r1.1 src/sys/dev/nand/nand_toshiba.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/nand/files.nand
diff -u src/sys/dev/nand/files.nand:1.5 src/sys/dev/nand/files.nand:1.6
--- src/sys/dev/nand/files.nand:1.5 Wed Oct 31 18:58:08 2012
+++ src/sys/dev/nand/files.nand Thu Nov 9 21:50:15 2017
@@ -1,4 +1,4 @@
-# $NetBSD: files.nand,v 1.5 2012/10/31 18:58:08 riz Exp $
+# $NetBSD: files.nand,v 1.6 2017/11/09 21:50:15 jmcneill Exp $
define nandbus { }
@@ -10,6 +10,7 @@ file dev/nand/nand_bbt.c nand
file dev/nand/nand_crc.c nand
file dev/nand/nand_micron.c nand
file dev/nand/nand_samsung.c nand
+file dev/nand/nand_toshiba.c nand
defpseudodev nandemulator: nandbus
file dev/nand/nandemulator.c nandemulator
Index: src/sys/dev/nand/nand.c
diff -u src/sys/dev/nand/nand.c:1.25 src/sys/dev/nand/nand.c:1.26
--- src/sys/dev/nand/nand.c:1.25 Tue Oct 4 14:47:18 2016
+++ src/sys/dev/nand/nand.c Thu Nov 9 21:50:15 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: nand.c,v 1.25 2016/10/04 14:47:18 kiyohara Exp $ */
+/* $NetBSD: nand.c,v 1.26 2017/11/09 21:50:15 jmcneill Exp $ */
/*-
* Copyright (c) 2010 Department of Software Engineering,
@@ -34,7 +34,7 @@
/* Common driver for NAND chips implementing the ONFI 2.2 specification */
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nand.c,v 1.25 2016/10/04 14:47:18 kiyohara Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nand.c,v 1.26 2017/11/09 21:50:15 jmcneill Exp $");
#include "locators.h"
@@ -88,7 +88,6 @@ struct flash_interface nand_flash_if = {
.submit = nand_flash_submit
};
-#ifdef NAND_VERBOSE
const struct nand_manufacturer nand_mfrs[] = {
{ NAND_MFR_AMD, "AMD" },
{ NAND_MFR_FUJITSU, "Fujitsu" },
@@ -116,7 +115,6 @@ nand_midtoname(int id)
return nand_mfrs[i].name;
}
-#endif
/* ARGSUSED */
int
@@ -335,6 +333,8 @@ nand_fill_chip_structure_legacy(device_t
return nand_read_parameters_micron(self, chip);
case NAND_MFR_SAMSUNG:
return nand_read_parameters_samsung(self, chip);
+ case NAND_MFR_TOSHIBA:
+ return nand_read_parameters_toshiba(self, chip);
default:
return 1;
}
@@ -368,6 +368,12 @@ nand_scan_media(device_t self, struct na
nand_read_1(self, &onfi_signature[3]);
nand_select(self, false);
+#ifdef NAND_DEBUG
+ device_printf(self, "signature: %02x %02x %02x %02x\n",
+ onfi_signature[0], onfi_signature[1],
+ onfi_signature[2], onfi_signature[3]);
+#endif
+
if (onfi_signature[0] != 'O' || onfi_signature[1] != 'N' ||
onfi_signature[2] != 'F' || onfi_signature[3] != 'I') {
chip->nc_isonfi = false;
@@ -395,13 +401,11 @@ nand_scan_media(device_t self, struct na
}
}
-#ifdef NAND_VERBOSE
aprint_normal_dev(self,
"manufacturer id: 0x%.2x (%s), device id: 0x%.2x\n",
chip->nc_manf_id,
nand_midtoname(chip->nc_manf_id),
chip->nc_dev_id);
-#endif
aprint_normal_dev(self,
"page size: %" PRIu32 " bytes, spare size: %" PRIu32 " bytes, "
Index: src/sys/dev/nand/nand.h
diff -u src/sys/dev/nand/nand.h:1.16 src/sys/dev/nand/nand.h:1.17
--- src/sys/dev/nand/nand.h:1.16 Sat Nov 3 12:12:48 2012
+++ src/sys/dev/nand/nand.h Thu Nov 9 21:50:15 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: nand.h,v 1.16 2012/11/03 12:12:48 ahoka Exp $ */
+/* $NetBSD: nand.h,v 1.17 2017/11/09 21:50:15 jmcneill Exp $ */
/*-
* Copyright (c) 2010 Department of Software Engineering,
@@ -428,6 +428,7 @@ extern const struct nand_manufacturer na
*/
int nand_read_parameters_micron(device_t, struct nand_chip *);
int nand_read_parameters_samsung(device_t, struct nand_chip *);
+int nand_read_parameters_toshiba(device_t, struct nand_chip *);
/* debug inlines */
Added files:
Index: src/sys/dev/nand/nand_toshiba.c
diff -u /dev/null src/sys/dev/nand/nand_toshiba.c:1.1
--- /dev/null Thu Nov 9 21:50:15 2017
+++ src/sys/dev/nand/nand_toshiba.c Thu Nov 9 21:50:15 2017
@@ -0,0 +1,155 @@
+/* $NetBSD: nand_toshiba.c,v 1.1 2017/11/09 21:50:15 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2012-2017 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Adam Hoka.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Device specific functions for legacy Toshiba NAND chips
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: nand_toshiba.c,v 1.1 2017/11/09 21:50:15 jmcneill Exp $");
+
+#include "nand.h"
+#include "onfi.h"
+
+enum {
+ NAND_TOSHIBA_PAGEMASK = 0x3,
+ NAND_TOSHIBA_OOBMASK = 0x1 << 2,
+ NAND_TOSHIBA_BLOCKMASK = 0x3 << 4,
+ NAND_TOSHIBA_BITSMASK = 0x1 << 6
+};
+
+enum {
+ NAND_TOSHIBA_PLANENUMMASK = 0x3 << 2
+};
+
+int
+nand_read_parameters_toshiba(device_t self, struct nand_chip * const chip)
+{
+ uint8_t mfgrid;
+ uint8_t devid;
+ uint8_t params1;
+ uint8_t params2;
+ uint8_t params3;
+
+ nand_select(self, true);
+ nand_command(self, ONFI_READ_ID);
+ nand_address(self, 0x00);
+ nand_read_1(self, &mfgrid);
+ nand_read_1(self, &devid);
+ nand_read_1(self, ¶ms1);
+ nand_read_1(self, ¶ms2);
+ nand_read_1(self, ¶ms3);
+ nand_select(self, false);
+
+ aprint_debug_dev(self,
+ "ID Definition table: 0x%2.x 0x%2.x 0x%2.x 0x%2.x 0x%2.x\n",
+ mfgrid, devid, params1, params2, params3);
+
+ if (devid == 0xdc) {
+ /* From the documentation */
+ chip->nc_addr_cycles_column = 2;
+ chip->nc_addr_cycles_row = 3;
+ chip->nc_lun_blocks = 2048;
+
+ switch (params2 & NAND_TOSHIBA_PAGEMASK) {
+ case 0x0:
+ chip->nc_page_size = 1024;
+ break;
+ case 0x1:
+ chip->nc_page_size = 2048;
+ break;
+ case 0x2:
+ chip->nc_page_size = 4096;
+ break;
+ case 0x3:
+ chip->nc_page_size = 8192;
+ break;
+ default:
+ KASSERTMSG(false, "ID Data parsing bug detected!");
+ }
+
+ chip->nc_spare_size =
+ (8 << __SHIFTOUT(params2, NAND_TOSHIBA_OOBMASK)) *
+ (chip->nc_page_size >> 9);
+
+ switch ((params2 & NAND_TOSHIBA_BLOCKMASK) >> 4) {
+ case 0x0:
+ chip->nc_block_size = 64 * 1024;
+ break;
+ case 0x1:
+ chip->nc_block_size = 128 * 1024;
+ break;
+ case 0x2:
+ chip->nc_block_size = 256 * 1024;
+ break;
+ case 0x3:
+ chip->nc_block_size = 512 * 1024;
+ break;
+ default:
+ KASSERTMSG(false, "ID Data parsing bug detected!");
+ }
+
+ switch ((params2 & NAND_TOSHIBA_BITSMASK) >> 6) {
+ case 0x0:
+ /* its an 8bit chip */
+ break;
+ case 0x1:
+ chip->nc_flags |= NC_BUSWIDTH_16;
+ break;
+ default:
+ KASSERTMSG(false, "ID Data parsing bug detected!");
+ }
+
+ switch ((params3 & NAND_TOSHIBA_PLANENUMMASK) >> 2) {
+ case 0x0:
+ chip->nc_num_luns = 1;
+ break;
+ case 0x1:
+ chip->nc_num_luns = 2;
+ break;
+ case 0x2:
+ chip->nc_num_luns = 4;
+ break;
+ case 0x3:
+ chip->nc_num_luns = 8;
+ break;
+ default:
+ KASSERTMSG(false, "ID Data parsing bug detected!");
+ }
+
+ chip->nc_size = (uint64_t)chip->nc_lun_blocks *
+ chip->nc_block_size;
+ } else {
+ return 1;
+ }
+
+ return 0;
+}
