Module Name: src
Committed By: ryo
Date: Tue Nov 28 13:09:05 UTC 2017
Modified Files:
src/lib/libc/arch/aarch64/gen: _setjmp.S setjmp.S
Log Message:
fix to work
* no need to check x29 != NULL. fp may be NULL.
* don't break in-use register x5.
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/lib/libc/arch/aarch64/gen/_setjmp.S
cvs rdiff -u -r1.1 -r1.2 src/lib/libc/arch/aarch64/gen/setjmp.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/lib/libc/arch/aarch64/gen/_setjmp.S
diff -u src/lib/libc/arch/aarch64/gen/_setjmp.S:1.2 src/lib/libc/arch/aarch64/gen/_setjmp.S:1.3
--- src/lib/libc/arch/aarch64/gen/_setjmp.S:1.2 Tue Nov 28 09:06:25 2017
+++ src/lib/libc/arch/aarch64/gen/_setjmp.S Tue Nov 28 13:09:05 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: _setjmp.S,v 1.2 2017/11/28 09:06:25 ryo Exp $ */
+/* $NetBSD: _setjmp.S,v 1.3 2017/11/28 13:09:05 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -83,7 +83,6 @@ ENTRY(_longjmp)
ldp x4, x5, [x0, #_JB_X29]
cbz x3, .Lbotch
- cbz x4, .Lbotch
cbz x5, .Lbotch
cmp x2, x7
b.ne .Lbotch
@@ -94,8 +93,8 @@ ENTRY(_longjmp)
ldp x25, x26, [x0, #_JB_X25]
ldp x27, x28, [x0, #_JB_X27]
- ldr x5, [x0, #_JB_TPIDR]
- msr tpidr_el0, x5
+ ldr x2, [x0, #_JB_TPIDR]
+ msr tpidr_el0, x2
ldp d8, d9, [x0, #_JB_D8]
ldp d10, d11, [x0, #_JB_D10]
Index: src/lib/libc/arch/aarch64/gen/setjmp.S
diff -u src/lib/libc/arch/aarch64/gen/setjmp.S:1.1 src/lib/libc/arch/aarch64/gen/setjmp.S:1.2
--- src/lib/libc/arch/aarch64/gen/setjmp.S:1.1 Sun Aug 10 05:47:36 2014
+++ src/lib/libc/arch/aarch64/gen/setjmp.S Tue Nov 28 13:09:05 2017
@@ -1,4 +1,4 @@
-/*.$NetBSD: setjmp.S,v 1.1 2014/08/10 05:47:36 matt Exp $.*/
+/*.$NetBSD: setjmp.S,v 1.2 2017/11/28 13:09:05 ryo Exp $.*/
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -92,7 +92,6 @@ ENTRY(__longjmp14)
ldp x4, x5, [x0, #_JB_X29]
cbz x3, .Lbotch
- cbz x4, .Lbotch
cbz x5, .Lbotch
ldp x19, x20, [x0, #_JB_X19]
@@ -101,8 +100,8 @@ ENTRY(__longjmp14)
ldp x25, x26, [x0, #_JB_X25]
ldp x27, x28, [x0, #_JB_X27]
- ldr x5, [x0, #_JB_TPIDR]
- msr tpidr_el0, x5
+ ldr x2, [x0, #_JB_TPIDR]
+ msr tpidr_el0, x2
ldp d8, d9, [x0, #_JB_D8]
ldp d10, d11, [x0, #_JB_D10]
