Module Name: src
Committed By: maya
Date: Wed Mar 7 23:08:29 UTC 2018
Modified Files:
src/sys/arch/mips/include: cpu.h
Log Message:
Adjust ci on the second iteration.
Now a MULTIPROCESSOR+LOCKDEBUG ERLITE reaches userland again
To generate a diff of this commit:
cvs rdiff -u -r1.123 -r1.124 src/sys/arch/mips/include/cpu.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/cpu.h
diff -u src/sys/arch/mips/include/cpu.h:1.123 src/sys/arch/mips/include/cpu.h:1.124
--- src/sys/arch/mips/include/cpu.h:1.123 Mon Jan 22 23:20:26 2018
+++ src/sys/arch/mips/include/cpu.h Wed Mar 7 23:08:29 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.123 2018/01/22 23:20:26 maya Exp $ */
+/* $NetBSD: cpu.h,v 1.124 2018/03/07 23:08:29 maya Exp $ */
/*-
* Copyright (c) 1992, 1993
@@ -160,9 +160,11 @@ struct cpu_info {
#ifdef MULTIPROCESSOR
#define CPU_INFO_ITERATOR int
#define CPU_INFO_FOREACH(cii, ci) \
- cii = 0, ci = (ncpu ? cpu_infos[0] : &cpu_info_store); \
- cii < (ncpu ? ncpu : 1); \
- ++cii
+ cii = 0, ci = &cpu_info_store; \
+ ci != NULL; \
+ cii++, \
+ ncpu ? (ci = cpu_infos[cii]) \
+ : (ci = NULL)
#else
#define CPU_INFO_ITERATOR int __unused
#define CPU_INFO_FOREACH(cii, ci) \
