Module Name:    src
Committed By:   maxv
Date:           Thu Mar 29 07:21:25 UTC 2018

Modified Files:
        src/sys/arch/amd64/amd64: locore.S
        src/sys/arch/x86/x86: spectre.c

Log Message:
Allow IBRS to be disabled dynamically.


To generate a diff of this commit:
cvs rdiff -u -r1.161 -r1.162 src/sys/arch/amd64/amd64/locore.S
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/x86/x86/spectre.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.161 src/sys/arch/amd64/amd64/locore.S:1.162
--- src/sys/arch/amd64/amd64/locore.S:1.161	Wed Mar 28 19:56:40 2018
+++ src/sys/arch/amd64/amd64/locore.S	Thu Mar 29 07:21:24 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.161 2018/03/28 19:56:40 maxv Exp $	*/
+/*	$NetBSD: locore.S,v 1.162 2018/03/29 07:21:24 maxv Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -1682,3 +1682,11 @@ LABEL(ibrs_leave)
 	wrmsr
 1234:
 LABEL(ibrs_leave_end)
+
+LABEL(noibrs_enter)
+	NOIBRS_ENTER
+LABEL(noibrs_enter_end)
+
+LABEL(noibrs_leave)
+	NOIBRS_LEAVE
+LABEL(noibrs_leave_end)

Index: src/sys/arch/x86/x86/spectre.c
diff -u src/sys/arch/x86/x86/spectre.c:1.4 src/sys/arch/x86/x86/spectre.c:1.5
--- src/sys/arch/x86/x86/spectre.c:1.4	Thu Mar 29 07:15:12 2018
+++ src/sys/arch/x86/x86/spectre.c	Thu Mar 29 07:21:24 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: spectre.c,v 1.4 2018/03/29 07:15:12 maxv Exp $	*/
+/*	$NetBSD: spectre.c,v 1.5 2018/03/29 07:21:24 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018 NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: spectre.c,v 1.4 2018/03/29 07:15:12 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: spectre.c,v 1.5 2018/03/29 07:21:24 maxv Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -129,6 +129,28 @@ static volatile unsigned long ibrs_cpu_b
 static volatile unsigned long ibrs_cpu_barrier2 __cacheline_aligned;
 
 static void
+ibrs_disable_hotpatch(void)
+{
+	extern uint8_t noibrs_enter, noibrs_enter_end;
+	extern uint8_t noibrs_leave, noibrs_leave_end;
+	u_long psl, cr0;
+	uint8_t *bytes;
+	size_t size;
+
+	x86_patch_window_open(&psl, &cr0);
+
+	bytes = &noibrs_enter;
+	size = (size_t)&noibrs_enter_end - (size_t)&noibrs_enter;
+	x86_hotpatch(HP_NAME_IBRS_ENTER, bytes, size);
+
+	bytes = &noibrs_leave;
+	size = (size_t)&noibrs_leave_end - (size_t)&noibrs_leave;
+	x86_hotpatch(HP_NAME_IBRS_LEAVE, bytes, size);
+
+	x86_patch_window_close(psl, cr0);
+}
+
+static void
 ibrs_enable_hotpatch(void)
 {
 	extern uint8_t ibrs_enter, ibrs_enter_end;
@@ -170,10 +192,14 @@ ibrs_change_cpu(void *arg1, void *arg2)
 		if (enabled) {
 			ibrs_enable_hotpatch();
 		} else {
-			/* TODO */
+			ibrs_disable_hotpatch();
 		}
 	}
 
+	if (!enabled) {
+		wrmsr(MSR_IA32_SPEC_CTRL, 0);
+	}
+
 	atomic_dec_ulong(&ibrs_cpu_barrier2);
 	while (atomic_cas_ulong(&ibrs_cpu_barrier2, 0, 0) != 0) {
 		x86_pause();

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