Module Name: src
Committed By: jmcneill
Date: Wed May 2 11:02:42 UTC 2018
Modified Files:
src/sys/arch/evbarm/conf: GENERIC64 SUNXI
Log Message:
Add sun50ih6rccu
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/evbarm/conf/GENERIC64
cvs rdiff -u -r1.66 -r1.67 src/sys/arch/evbarm/conf/SUNXI
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/evbarm/conf/GENERIC64
diff -u src/sys/arch/evbarm/conf/GENERIC64:1.7 src/sys/arch/evbarm/conf/GENERIC64:1.8
--- src/sys/arch/evbarm/conf/GENERIC64:1.7 Wed May 2 10:09:15 2018
+++ src/sys/arch/evbarm/conf/GENERIC64 Wed May 2 11:02:42 2018
@@ -1,5 +1,5 @@
#
-# $NetBSD: GENERIC64,v 1.7 2018/05/02 10:09:15 jmcneill Exp $
+# $NetBSD: GENERIC64,v 1.8 2018/05/02 11:02:42 jmcneill Exp $
#
# GENERIC ARM (aarch64) kernel
#
@@ -132,6 +132,7 @@ sun8ih3ccu* at fdt? pass 2 # Allwinner
sun8ih3rccu* at fdt? pass 2 # Allwinner H3/H5 CCU (PRCM)
sun50ia64ccu* at fdt? pass 2 # Allwinner A64 CCU
sun50ih6ccu* at fdt? pass 2 # Allwinner H6 CCU
+sun50ih6rccu* at fdt? pass 2 # Allwinner H6 CCU (PRCM)
sunxiresets* at fdt? pass 1 # Allwinner misc. resets
sunxigates* at fdt? pass 1 # Allwinner misc. gates
sunxigmacclk* at fdt? pass 2 # Allwinner GMAC MII/RGMII clock mux
Index: src/sys/arch/evbarm/conf/SUNXI
diff -u src/sys/arch/evbarm/conf/SUNXI:1.66 src/sys/arch/evbarm/conf/SUNXI:1.67
--- src/sys/arch/evbarm/conf/SUNXI:1.66 Wed May 2 00:02:06 2018
+++ src/sys/arch/evbarm/conf/SUNXI Wed May 2 11:02:42 2018
@@ -1,5 +1,5 @@
#
-# $NetBSD: SUNXI,v 1.66 2018/05/02 00:02:06 jmcneill Exp $
+# $NetBSD: SUNXI,v 1.67 2018/05/02 11:02:42 jmcneill Exp $
#
# Allwinner sunxi family
#
@@ -185,6 +185,7 @@ sun8ih3rccu* at fdt? pass 2 # H3 CCU (P
sun9ia80ccu* at fdt? pass 2 # A80 CCU
sun50ia64ccu* at fdt? pass 2 # A64 CCU
sun50ih6ccu* at fdt? pass 2 # H6 CCU
+sun50ih6rccu* at fdt? pass 2 # H6 CCU (PRCM)
sunxiresets* at fdt? pass 1 # Misc. clock resets
sunxigates* at fdt? pass 1 # Misc. clock gates
sunxigmacclk* at fdt? pass 2 # GMAC MII/RGMII clock mux
