Module Name:    src
Committed By:   msaitoh
Date:           Wed May  9 03:50:51 UTC 2018

Modified Files:
        src/sys/dev/pci: pci_subr.c pcireg.h

Log Message:
 Fix typo. s/TPL/TLP/


To generate a diff of this commit:
cvs rdiff -u -r1.200 -r1.201 src/sys/dev/pci/pci_subr.c
cvs rdiff -u -r1.137 -r1.138 src/sys/dev/pci/pcireg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/pci/pci_subr.c
diff -u src/sys/dev/pci/pci_subr.c:1.200 src/sys/dev/pci/pci_subr.c:1.201
--- src/sys/dev/pci/pci_subr.c:1.200	Thu Feb  1 09:09:14 2018
+++ src/sys/dev/pci/pci_subr.c	Wed May  9 03:50:51 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: pci_subr.c,v 1.200 2018/02/01 09:09:14 msaitoh Exp $	*/
+/*	$NetBSD: pci_subr.c,v 1.201 2018/05/09 03:50:51 msaitoh Exp $	*/
 
 /*
  * Copyright (c) 1997 Zubin D. Dittia.  All rights reserved.
@@ -40,7 +40,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.200 2018/02/01 09:09:14 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.201 2018/05/09 03:50:51 msaitoh Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_pci.h"
@@ -3846,7 +3846,7 @@ pci_conf_print_dpc_cap(const pcireg_t *r
 	    extcapoff + PCI_DPC_RPPIO_HLOG);
 	printf("    RP PIO ImpSpec Log Register: start from 0x%03x\n",
 	    extcapoff + PCI_DPC_RPPIO_IMPSLOG);
-	printf("    RP PIO TPL Prefix Log Register: start from 0x%03x\n",
+	printf("    RP PIO TLP Prefix Log Register: start from 0x%03x\n",
 	    extcapoff + PCI_DPC_RPPIO_TLPPLOG);
 }
 

Index: src/sys/dev/pci/pcireg.h
diff -u src/sys/dev/pci/pcireg.h:1.137 src/sys/dev/pci/pcireg.h:1.138
--- src/sys/dev/pci/pcireg.h:1.137	Thu Feb  1 09:09:14 2018
+++ src/sys/dev/pci/pcireg.h	Wed May  9 03:50:51 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: pcireg.h,v 1.137 2018/02/01 09:09:14 msaitoh Exp $	*/
+/*	$NetBSD: pcireg.h,v 1.138 2018/05/09 03:50:51 msaitoh Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996, 1999, 2000
@@ -2029,7 +2029,7 @@ struct pci_rom {
   /* Same */
 #define	PCI_DPC_RPPIO_HLOG 0x20	/* RP PIO Header Log Register */
 #define	PCI_DPC_RPPIO_IMPSLOG 0x30 /* RP PIO ImpSpec Log Register */
-#define	PCI_DPC_RPPIO_TLPPLOG 0x34 /* RP PIO TPL Prefix Log Register */
+#define	PCI_DPC_RPPIO_TLPPLOG 0x34 /* RP PIO TLP Prefix Log Register */
 
 /*
  * Extended capability ID: 0x001e

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