Module Name: src
Committed By: maya
Date: Fri May 11 07:41:11 UTC 2018
Modified Files:
src/sys/dev/ic: bwfm.c bwfmreg.h bwfmvar.h
src/sys/dev/sdmmc: if_bwfm_sdio.c
src/sys/dev/usb: if_bwfm_usb.c
Log Message:
sync with openbsd bwfm to some extent.
add a txcheck
set chip active/passive for more kinds of chips
add wrapper around setting active/passive
detect chip RAM
make bwfm_rx take an mbuf
To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/dev/ic/bwfm.c
cvs rdiff -u -r1.2 -r1.3 src/sys/dev/ic/bwfmreg.h
cvs rdiff -u -r1.1 -r1.2 src/sys/dev/ic/bwfmvar.h
cvs rdiff -u -r1.2 -r1.3 src/sys/dev/sdmmc/if_bwfm_sdio.c
cvs rdiff -u -r1.4 -r1.5 src/sys/dev/usb/if_bwfm_usb.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/ic/bwfm.c
diff -u src/sys/dev/ic/bwfm.c:1.10 src/sys/dev/ic/bwfm.c:1.11
--- src/sys/dev/ic/bwfm.c:1.10 Tue Jan 16 18:42:43 2018
+++ src/sys/dev/ic/bwfm.c Fri May 11 07:41:11 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: bwfm.c,v 1.10 2018/01/16 18:42:43 maxv Exp $ */
+/* $NetBSD: bwfm.c,v 1.11 2018/05/11 07:41:11 maya Exp $ */
/* $OpenBSD: bwfm.c,v 1.5 2017/10/16 22:27:16 patrick Exp $ */
/*
* Copyright (c) 2010-2016 Broadcom Corporation
@@ -21,7 +21,6 @@
#include <sys/systm.h>
#include <sys/buf.h>
#include <sys/kernel.h>
-#include <sys/malloc.h>
#include <sys/device.h>
#include <sys/queue.h>
#include <sys/socket.h>
@@ -85,9 +84,16 @@ void bwfm_chip_ai_reset(struct bwfm_sof
void bwfm_chip_dmp_erom_scan(struct bwfm_softc *);
int bwfm_chip_dmp_get_regaddr(struct bwfm_softc *, uint32_t *,
uint32_t *, uint32_t *);
+int bwfm_chip_cr4_set_active(struct bwfm_softc *, const uint32_t);
void bwfm_chip_cr4_set_passive(struct bwfm_softc *);
+int bwfm_chip_ca7_set_active(struct bwfm_softc *, const uint32_t);
void bwfm_chip_ca7_set_passive(struct bwfm_softc *);
+int bwfm_chip_cm3_set_active(struct bwfm_softc *);
void bwfm_chip_cm3_set_passive(struct bwfm_softc *);
+void bwfm_chip_socram_ramsize(struct bwfm_softc *, struct bwfm_core *);
+void bwfm_chip_sysmem_ramsize(struct bwfm_softc *, struct bwfm_core *);
+void bwfm_chip_tcm_ramsize(struct bwfm_softc *, struct bwfm_core *);
+void bwfm_chip_tcm_rambase(struct bwfm_softc *);
int bwfm_proto_bcdc_query_dcmd(struct bwfm_softc *, int,
int, char *, size_t *);
@@ -107,7 +113,7 @@ struct ieee80211_channel *bwfm_bss2chan(
void bwfm_scan(struct bwfm_softc *);
void bwfm_connect(struct bwfm_softc *);
-void bwfm_rx(struct bwfm_softc *, char *, size_t);
+void bwfm_rx(struct bwfm_softc *, struct mbuf *);
void bwfm_rx_event(struct bwfm_softc *, char *, size_t);
void bwfm_scan_node(struct bwfm_softc *, struct bwfm_bss_info *, size_t);
@@ -133,7 +139,7 @@ bwfm_attach(struct bwfm_softc *sc)
char fw_version[BWFM_DCMD_SMLEN];
uint32_t bandlist[3];
uint32_t tmp;
- int i, error;
+ int i, j, error;
error = workqueue_create(&sc->sc_taskq, DEVNAME(sc),
bwfm_task, sc, PRI_NONE, IPL_NET, 0);
@@ -203,8 +209,8 @@ bwfm_attach(struct bwfm_softc *sc)
ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b;
ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g;
- for (i = 0; i < __arraycount(bwfm_2ghz_channels); i++) {
- uint8_t chan = bwfm_2ghz_channels[i];
+ for (j = 0; j < __arraycount(bwfm_2ghz_channels); j++) {
+ uint8_t chan = bwfm_2ghz_channels[j];
ic->ic_channels[chan].ic_freq =
ieee80211_ieee2mhz(chan, IEEE80211_CHAN_2GHZ);
ic->ic_channels[chan].ic_flags =
@@ -215,8 +221,8 @@ bwfm_attach(struct bwfm_softc *sc)
case BWFM_BAND_5G:
ic->ic_sup_rates[IEEE80211_MODE_11A] = ieee80211_std_rateset_11a;
- for (i = 0; i < __arraycount(bwfm_5ghz_channels); i++) {
- uint8_t chan = bwfm_5ghz_channels[i];
+ for (j = 0; j < __arraycount(bwfm_5ghz_channels); j++) {
+ uint8_t chan = bwfm_5ghz_channels[j];
ic->ic_channels[chan].ic_freq =
ieee80211_ieee2mhz(chan, IEEE80211_CHAN_5GHZ);
ic->ic_channels[chan].ic_flags =
@@ -307,6 +313,11 @@ bwfm_start(struct ifnet *ifp)
continue;
}
+ if (sc->sc_bus_ops->bs_txcheck(sc)) {
+ ifp->if_flags |= IFF_OACTIVE;
+ break;
+ }
+
IFQ_DEQUEUE(&ifp->if_snd, m);
if (m == NULL)
break;
@@ -848,24 +859,22 @@ bwfm_chip_attach(struct bwfm_softc *sc)
return 1;
}
- if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CR4) != NULL)
- bwfm_chip_cr4_set_passive(sc);
- if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CA7) != NULL)
- bwfm_chip_ca7_set_passive(sc);
- if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CM3) != NULL)
- bwfm_chip_cm3_set_passive(sc);
+ bwfm_chip_set_passive(sc);
if (sc->sc_buscore_ops->bc_reset) {
sc->sc_buscore_ops->bc_reset(sc);
- if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CR4) != NULL)
- bwfm_chip_cr4_set_passive(sc);
- if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CA7) != NULL)
- bwfm_chip_ca7_set_passive(sc);
- if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CM3) != NULL)
- bwfm_chip_cm3_set_passive(sc);
+ bwfm_chip_set_passive(sc);
}
- /* TODO: get raminfo */
+ if ((core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CR4)) != NULL) {
+ bwfm_chip_tcm_ramsize(sc, core);
+ bwfm_chip_tcm_rambase(sc);
+ } else if ((core = bwfm_chip_get_core(sc, BWFM_AGENT_SYS_MEM)) != NULL) {
+ bwfm_chip_sysmem_ramsize(sc, core);
+ bwfm_chip_tcm_rambase(sc);
+ } else if ((core = bwfm_chip_get_core(sc, BWFM_AGENT_INTERNAL_MEM)) != NULL) {
+ bwfm_chip_socram_ramsize(sc, core);
+ }
core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_CHIPCOMMON);
sc->sc_chip.ch_cc_caps = sc->sc_buscore_ops->bc_read(sc,
@@ -1117,16 +1126,116 @@ bwfm_chip_dmp_get_regaddr(struct bwfm_so
}
/* Core configuration */
+int
+bwfm_chip_set_active(struct bwfm_softc *sc, const uint32_t rstvec)
+{
+ if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CR4) != NULL)
+ return bwfm_chip_cr4_set_active(sc, rstvec);
+ if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CA7) != NULL)
+ return bwfm_chip_ca7_set_active(sc, rstvec);
+ if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CM3) != NULL)
+ return bwfm_chip_cm3_set_active(sc);
+ return 1;
+}
+
+void
+bwfm_chip_set_passive(struct bwfm_softc *sc)
+{
+ if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CR4) != NULL) {
+ bwfm_chip_cr4_set_passive(sc);
+ return;
+ }
+ if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CA7) != NULL) {
+ bwfm_chip_ca7_set_passive(sc);
+ return;
+ }
+ if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CM3) != NULL) {
+ bwfm_chip_cm3_set_passive(sc);
+ return;
+ }
+}
+
+int
+bwfm_chip_cr4_set_active(struct bwfm_softc *sc, const uint32_t rstvec)
+{
+ struct bwfm_core *core;
+
+ sc->sc_buscore_ops->bc_activate(sc, rstvec);
+ core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CR4);
+ sc->sc_chip.ch_core_reset(sc, core,
+ BWFM_AGENT_IOCTL_ARMCR4_CPUHALT, 0, 0);
+
+ return 0;
+}
+
void
bwfm_chip_cr4_set_passive(struct bwfm_softc *sc)
{
- panic("%s: CR4 not supported", DEVNAME(sc));
+ struct bwfm_core *core;
+ uint32_t val;
+
+ core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CR4);
+ val = sc->sc_buscore_ops->bc_read(sc,
+ core->co_wrapbase + BWFM_AGENT_IOCTL);
+ sc->sc_chip.ch_core_reset(sc, core,
+ val & BWFM_AGENT_IOCTL_ARMCR4_CPUHALT,
+ BWFM_AGENT_IOCTL_ARMCR4_CPUHALT,
+ BWFM_AGENT_IOCTL_ARMCR4_CPUHALT);
+
+ core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_80211);
+ sc->sc_chip.ch_core_reset(sc, core, BWFM_AGENT_D11_IOCTL_PHYRESET |
+ BWFM_AGENT_D11_IOCTL_PHYCLOCKEN, BWFM_AGENT_D11_IOCTL_PHYCLOCKEN,
+ BWFM_AGENT_D11_IOCTL_PHYCLOCKEN);
+}
+
+int
+bwfm_chip_ca7_set_active(struct bwfm_softc *sc, const uint32_t rstvec)
+{
+ struct bwfm_core *core;
+
+ sc->sc_buscore_ops->bc_activate(sc, rstvec);
+ core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CA7);
+ sc->sc_chip.ch_core_reset(sc, core,
+ BWFM_AGENT_IOCTL_ARMCR4_CPUHALT, 0, 0);
+
+ return 0;
}
void
bwfm_chip_ca7_set_passive(struct bwfm_softc *sc)
{
- panic("%s: CA7 not supported", DEVNAME(sc));
+ struct bwfm_core *core;
+ uint32_t val;
+
+ core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CA7);
+ val = sc->sc_buscore_ops->bc_read(sc,
+ core->co_wrapbase + BWFM_AGENT_IOCTL);
+ sc->sc_chip.ch_core_reset(sc, core,
+ val & BWFM_AGENT_IOCTL_ARMCR4_CPUHALT,
+ BWFM_AGENT_IOCTL_ARMCR4_CPUHALT,
+ BWFM_AGENT_IOCTL_ARMCR4_CPUHALT);
+
+ core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_80211);
+ sc->sc_chip.ch_core_reset(sc, core, BWFM_AGENT_D11_IOCTL_PHYRESET |
+ BWFM_AGENT_D11_IOCTL_PHYCLOCKEN, BWFM_AGENT_D11_IOCTL_PHYCLOCKEN,
+ BWFM_AGENT_D11_IOCTL_PHYCLOCKEN);
+}
+
+int
+bwfm_chip_cm3_set_active(struct bwfm_softc *sc)
+{
+ struct bwfm_core *core;
+
+ core = bwfm_chip_get_core(sc, BWFM_AGENT_INTERNAL_MEM);
+ if (!sc->sc_chip.ch_core_isup(sc, core))
+ return 1;
+
+ sc->sc_buscore_ops->bc_activate(sc, 0);
+
+ core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CM3);
+ sc->sc_chip.ch_core_reset(sc, core, 0, 0, 0);
+
+ return 0;
}
void
@@ -1151,6 +1260,153 @@ bwfm_chip_cm3_set_passive(struct bwfm_so
}
}
+/* RAM size helpers */
+void
+bwfm_chip_socram_ramsize(struct bwfm_softc *sc, struct bwfm_core *core)
+{
+ uint32_t coreinfo, nb, lss, banksize, bankinfo;
+ uint32_t ramsize = 0, srsize = 0;
+ int i;
+
+ if (!sc->sc_chip.ch_core_isup(sc, core))
+ sc->sc_chip.ch_core_reset(sc, core, 0, 0, 0);
+
+ coreinfo = sc->sc_buscore_ops->bc_read(sc,
+ core->co_base + BWFM_SOCRAM_COREINFO);
+ nb = (coreinfo & BWFM_SOCRAM_COREINFO_SRNB_MASK)
+ >> BWFM_SOCRAM_COREINFO_SRNB_SHIFT;
+
+ if (core->co_rev <= 7 || core->co_rev == 12) {
+ banksize = coreinfo & BWFM_SOCRAM_COREINFO_SRBSZ_MASK;
+ lss = (coreinfo & BWFM_SOCRAM_COREINFO_LSS_MASK)
+ >> BWFM_SOCRAM_COREINFO_LSS_SHIFT;
+ if (lss != 0)
+ nb--;
+ ramsize = nb * (1 << (banksize + BWFM_SOCRAM_COREINFO_SRBSZ_BASE));
+ if (lss != 0)
+ ramsize += (1 << ((lss - 1) + BWFM_SOCRAM_COREINFO_SRBSZ_BASE));
+ } else {
+ for (i = 0; i < nb; i++) {
+ sc->sc_buscore_ops->bc_write(sc,
+ core->co_base + BWFM_SOCRAM_BANKIDX,
+ (BWFM_SOCRAM_BANKIDX_MEMTYPE_RAM <<
+ BWFM_SOCRAM_BANKIDX_MEMTYPE_SHIFT) | i);
+ bankinfo = sc->sc_buscore_ops->bc_read(sc,
+ core->co_base + BWFM_SOCRAM_BANKINFO);
+ banksize = ((bankinfo & BWFM_SOCRAM_BANKINFO_SZMASK) + 1)
+ * BWFM_SOCRAM_BANKINFO_SZBASE;
+ ramsize += banksize;
+ if (bankinfo & BWFM_SOCRAM_BANKINFO_RETNTRAM_MASK)
+ srsize += banksize;
+ }
+ }
+
+ switch (sc->sc_chip.ch_chip) {
+ case BRCM_CC_4334_CHIP_ID:
+ if (sc->sc_chip.ch_chiprev < 2)
+ srsize = 32 * 1024;
+ break;
+ case BRCM_CC_43430_CHIP_ID:
+ srsize = 64 * 1024;
+ break;
+ default:
+ break;
+ }
+
+ sc->sc_chip.ch_ramsize = ramsize;
+ sc->sc_chip.ch_srsize = srsize;
+}
+
+void
+bwfm_chip_sysmem_ramsize(struct bwfm_softc *sc, struct bwfm_core *core)
+{
+ uint32_t coreinfo, nb, banksize, bankinfo;
+ uint32_t ramsize = 0;
+ int i;
+
+ if (!sc->sc_chip.ch_core_isup(sc, core))
+ sc->sc_chip.ch_core_reset(sc, core, 0, 0, 0);
+
+ coreinfo = sc->sc_buscore_ops->bc_read(sc,
+ core->co_base + BWFM_SOCRAM_COREINFO);
+ nb = (coreinfo & BWFM_SOCRAM_COREINFO_SRNB_MASK)
+ >> BWFM_SOCRAM_COREINFO_SRNB_SHIFT;
+
+ for (i = 0; i < nb; i++) {
+ sc->sc_buscore_ops->bc_write(sc,
+ core->co_base + BWFM_SOCRAM_BANKIDX,
+ (BWFM_SOCRAM_BANKIDX_MEMTYPE_RAM <<
+ BWFM_SOCRAM_BANKIDX_MEMTYPE_SHIFT) | i);
+ bankinfo = sc->sc_buscore_ops->bc_read(sc,
+ core->co_base + BWFM_SOCRAM_BANKINFO);
+ banksize = ((bankinfo & BWFM_SOCRAM_BANKINFO_SZMASK) + 1)
+ * BWFM_SOCRAM_BANKINFO_SZBASE;
+ ramsize += banksize;
+ }
+
+ sc->sc_chip.ch_ramsize = ramsize;
+}
+
+void
+bwfm_chip_tcm_ramsize(struct bwfm_softc *sc, struct bwfm_core *core)
+{
+ uint32_t cap, nab, nbb, totb, bxinfo, ramsize = 0;
+ int i;
+
+ cap = sc->sc_buscore_ops->bc_read(sc, core->co_base + BWFM_ARMCR4_CAP);
+ nab = (cap & BWFM_ARMCR4_CAP_TCBANB_MASK) >> BWFM_ARMCR4_CAP_TCBANB_SHIFT;
+ nbb = (cap & BWFM_ARMCR4_CAP_TCBBNB_MASK) >> BWFM_ARMCR4_CAP_TCBBNB_SHIFT;
+ totb = nab + nbb;
+
+ for (i = 0; i < totb; i++) {
+ sc->sc_buscore_ops->bc_write(sc,
+ core->co_base + BWFM_ARMCR4_BANKIDX, i);
+ bxinfo = sc->sc_buscore_ops->bc_read(sc,
+ core->co_base + BWFM_ARMCR4_BANKINFO);
+ ramsize += ((bxinfo & BWFM_ARMCR4_BANKINFO_BSZ_MASK) + 1) *
+ BWFM_ARMCR4_BANKINFO_BSZ_MULT;
+ }
+
+ sc->sc_chip.ch_ramsize = ramsize;
+}
+
+void
+bwfm_chip_tcm_rambase(struct bwfm_softc *sc)
+{
+ switch (sc->sc_chip.ch_chip) {
+ case BRCM_CC_4345_CHIP_ID:
+ sc->sc_chip.ch_rambase = 0x198000;
+ break;
+ case BRCM_CC_4335_CHIP_ID:
+ case BRCM_CC_4339_CHIP_ID:
+ case BRCM_CC_4350_CHIP_ID:
+ case BRCM_CC_4354_CHIP_ID:
+ case BRCM_CC_4356_CHIP_ID:
+ case BRCM_CC_43567_CHIP_ID:
+ case BRCM_CC_43569_CHIP_ID:
+ case BRCM_CC_43570_CHIP_ID:
+ case BRCM_CC_4358_CHIP_ID:
+ case BRCM_CC_4359_CHIP_ID:
+ case BRCM_CC_43602_CHIP_ID:
+ case BRCM_CC_4371_CHIP_ID:
+ sc->sc_chip.ch_rambase = 0x180000;
+ break;
+ case BRCM_CC_43465_CHIP_ID:
+ case BRCM_CC_43525_CHIP_ID:
+ case BRCM_CC_4365_CHIP_ID:
+ case BRCM_CC_4366_CHIP_ID:
+ sc->sc_chip.ch_rambase = 0x200000;
+ break;
+ case CY_CC_4373_CHIP_ID:
+ sc->sc_chip.ch_rambase = 0x160000;
+ break;
+ default:
+ printf("%s: unknown chip: %d\n", DEVNAME(sc),
+ sc->sc_chip.ch_chip);
+ break;
+ }
+}
+
/* BCDC protocol implementation */
int
bwfm_proto_bcdc_query_dcmd(struct bwfm_softc *sc, int ifidx,
@@ -1504,44 +1760,26 @@ bwfm_connect(struct bwfm_softc *sc)
}
void
-bwfm_rx(struct bwfm_softc *sc, char *buf, size_t len)
+bwfm_rx(struct bwfm_softc *sc, struct mbuf *m)
{
struct ieee80211com *ic = &sc->sc_ic;
struct ifnet *ifp = ic->ic_ifp;
- struct bwfm_event *e = (void *)buf;
- struct mbuf *m;
- char *mb;
+ struct bwfm_event *e = mtod(m, struct bwfm_event *);
int s;
- DPRINTF(("%s: buf %p len %lu\n", __func__, buf, len));
-
- if (len >= sizeof(e->ehdr) &&
+ if (m->m_len >= sizeof(e->ehdr) &&
ntohs(e->ehdr.ether_type) == BWFM_ETHERTYPE_LINK_CTL &&
memcmp(BWFM_BRCM_OUI, e->hdr.oui, sizeof(e->hdr.oui)) == 0 &&
- ntohs(e->hdr.usr_subtype) == BWFM_BRCM_SUBTYPE_EVENT)
- bwfm_rx_event(sc, buf, len);
-
- if (__predict_false(len > MCLBYTES || len == 0))
+ ntohs(e->hdr.usr_subtype) == BWFM_BRCM_SUBTYPE_EVENT) {
+ bwfm_rx_event(sc, mtod(m, char *), m->m_len);
+ m_freem(m);
return;
- MGETHDR(m, M_DONTWAIT, MT_DATA);
- if (__predict_false(m == NULL))
- return;
- if (len > MHLEN) {
- MCLGET(m, M_DONTWAIT);
- if (!(m->m_flags & M_EXT)) {
- m_free(m);
- return;
- }
}
s = splnet();
if ((ifp->if_flags & IFF_RUNNING) != 0) {
- mb = mtod(m, char *);
- memcpy(mb, buf, len);
- m->m_pkthdr.len = m->m_len = len;
m_set_rcvif(m, ifp);
-
if_percpuq_enqueue(ifp->if_percpuq, m);
}
@@ -1627,7 +1865,7 @@ bwfm_rx_event(struct bwfm_softc *sc, cha
if (ntohl(e->msg.status) == BWFM_E_STATUS_SUCCESS &&
ntohl(e->msg.reason) == 0)
break;
-
+
/* Link status has changed */
ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
break;
Index: src/sys/dev/ic/bwfmreg.h
diff -u src/sys/dev/ic/bwfmreg.h:1.2 src/sys/dev/ic/bwfmreg.h:1.3
--- src/sys/dev/ic/bwfmreg.h:1.2 Fri Oct 20 23:38:56 2017
+++ src/sys/dev/ic/bwfmreg.h Fri May 11 07:41:11 2018
@@ -1,5 +1,5 @@
-/* $NetBSD: bwfmreg.h,v 1.2 2017/10/20 23:38:56 jmcneill Exp $ */
-/* $OpenBSD: bwfmreg.h,v 1.4 2017/10/16 22:27:16 patrick Exp $ */
+/* $NetBSD: bwfmreg.h,v 1.3 2018/05/11 07:41:11 maya Exp $ */
+/* $OpenBSD: bwfmreg.h,v 1.16 2018/02/07 21:44:09 patrick Exp $ */
/*
* Copyright (c) 2010-2016 Broadcom Corporation
* Copyright (c) 2016,2017 Patrick Wildt <[email protected]>
@@ -50,13 +50,24 @@
#define BWFM_CHIP_REG_CAPABILITIES_PMU 0x10000000
#define BWFM_CHIP_REG_CAPABILITIES_EXT 0x000000AC
#define BWFM_CHIP_REG_CAPABILITIES_EXT_AOB_PRESENT 0x00000040
+#define BWFM_CHIP_REG_WATCHDOG 0x00000080
#define BWFM_CHIP_REG_EROMPTR 0x000000FC
+#define BWFM_CHIP_REG_SR_CAPABILITY 0x00000500
+#define BWFM_CHIP_REG_SR_CONTROL0 0x00000504
+#define BWFM_CHIP_REG_SR_CONTROL1 0x00000508
#define BWFM_CHIP_REG_PMUCONTROL 0x00000600
#define BWFM_CHIP_REG_PMUCONTROL_RES_MASK 0x00006000
#define BWFM_CHIP_REG_PMUCONTROL_RES_SHIFT 13
#define BWFM_CHIP_REG_PMUCONTROL_RES_RELOAD 0x2
#define BWFM_CHIP_REG_PMUCAPABILITIES 0x00000604
#define BWFM_CHIP_REG_PMUCAPABILITIES_REV_MASK 0x000000ff
+#define BWFM_CHIP_REG_PMUCAPABILITIES_EXT 0x0000064C
+#define BWFM_CHIP_REG_PMUCAPABILITIES_SR_SUPP (1 << 1)
+#define BWFM_CHIP_REG_CHIPCONTROL_ADDR 0x00000650
+#define BWFM_CHIP_REG_CHIPCONTROL_DATA 0x00000654
+#define BWFM_CHIP_REG_RETENTION_CTL 0x00000670
+#define BWFM_CHIP_REG_RETENTION_CTL_MACPHY_DIS (1 << 26)
+#define BWFM_CHIP_REG_RETENTION_CTL_LOGIC_DIS (1 << 27)
/* Agent registers */
#define BWFM_AGENT_IOCTL 0x0408
@@ -65,6 +76,7 @@
#define BWFM_AGENT_IOCTL_CORE_BITS 0x3FFC
#define BWFM_AGENT_IOCTL_PME_EN 0x4000
#define BWFM_AGENT_IOCTL_BIST_EN 0x8000
+#define BWFM_AGENT_IOCTL_ARMCR4_CPUHALT 0x0020
#define BWFM_AGENT_RESET_CTL 0x0800
#define BWFM_AGENT_RESET_CTL_RESET 0x0001
@@ -75,16 +87,46 @@
#define BWFM_AGENT_CORE_PMU 0x827
#define BWFM_AGENT_CORE_SDIO_DEV 0x829
#define BWFM_AGENT_CORE_ARM_CM3 0x82A
+#define BWFM_AGENT_CORE_PCIE2 0x83C
#define BWFM_AGENT_CORE_ARM_CR4 0x83E
#define BWFM_AGENT_CORE_ARM_CA7 0x847
+#define BWFM_AGENT_SYS_MEM 0x849
/* Specific Core Bits */
#define BWFM_AGENT_ARMCR4_IOCTL_CPUHALT 0x0020
#define BWFM_AGENT_D11_IOCTL_PHYCLOCKEN 0x0004
#define BWFM_AGENT_D11_IOCTL_PHYRESET 0x0008
+/* CR4 registers */
+#define BWFM_ARMCR4_CAP 0x0004
+#define BWFM_ARMCR4_CAP_TCBANB_MASK 0xf
+#define BWFM_ARMCR4_CAP_TCBANB_SHIFT 0
+#define BWFM_ARMCR4_CAP_TCBBNB_MASK 0xf0
+#define BWFM_ARMCR4_CAP_TCBBNB_SHIFT 4
+#define BWFM_ARMCR4_BANKIDX 0x0040
+#define BWFM_ARMCR4_BANKINFO 0x0044
+#define BWFM_ARMCR4_BANKINFO_BSZ_MASK 0x3f
+#define BWFM_ARMCR4_BANKINFO_BSZ_MULT 8192
+#define BWFM_ARMCR4_BANKPDA 0x004C
+
/* SOCRAM registers */
+#define BWFM_SOCRAM_COREINFO 0x0000
+#define BWFM_SOCRAM_COREINFO_SRBSZ_BASE 14
+#define BWFM_SOCRAM_COREINFO_SRBSZ_MASK 0xf
+#define BWFM_SOCRAM_COREINFO_SRBSZ_SHIFT 0
+#define BWFM_SOCRAM_COREINFO_SRNB_MASK 0xf0
+#define BWFM_SOCRAM_COREINFO_SRNB_SHIFT 4
+#define BWFM_SOCRAM_COREINFO_LSS_MASK 0xf00000
+#define BWFM_SOCRAM_COREINFO_LSS_SHIFT 20
#define BWFM_SOCRAM_BANKIDX 0x0010
+#define BWFM_SOCRAM_BANKIDX_MEMTYPE_RAM 0
+#define BWFM_SOCRAM_BANKIDX_MEMTYPE_ROM 1
+#define BWFM_SOCRAM_BANKIDX_MEMTYPE_DEVRAM 2
+#define BWFM_SOCRAM_BANKIDX_MEMTYPE_SHIFT 8
+#define BWFM_SOCRAM_BANKINFO 0x0040
+#define BWFM_SOCRAM_BANKINFO_SZBASE 8192
+#define BWFM_SOCRAM_BANKINFO_SZMASK 0x7f
+#define BWFM_SOCRAM_BANKINFO_RETNTRAM_MASK 0x10000
#define BWFM_SOCRAM_BANKPDA 0x0044
/* SDPCMD registers */
@@ -140,6 +182,13 @@
#define BWFM_AUTH_OPEN 0
#define BWFM_AUTH_SHARED_KEY 1
#define BWFM_AUTH_AUTO 2
+#define BWFM_CRYPTO_ALGO_OFF 0
+#define BWFM_CRYPTO_ALGO_WEP1 1
+#define BWFM_CRYPTO_ALGO_TKIP 2
+#define BWFM_CRYPTO_ALGO_WEP128 3
+#define BWFM_CRYPTO_ALGO_AES_CCM 4
+#define BWFM_CRYPTO_ALGO_AES_RESERVED1 5
+#define BWFM_CRYPTO_ALGO_AES_RESERVED2 6
#define BWFM_MFP_NONE 0
#define BWFM_MFP_CAPABLE 1
#define BWFM_MFP_REQUIRED 2
@@ -156,6 +205,59 @@
#define BWFM_WSEC_TKIP (1 << 1)
#define BWFM_WSEC_AES (1 << 2)
+/* Channel Parameters */
+#define BWFM_CHANSPEC_CHAN_MASK 0xff
+#define BWFM_CHANSPEC_CHAN_SHIFT 0
+#define BWFM_CHANSPEC_D11N_SB_L (0x1 << 8) /* control lower */
+#define BWFM_CHANSPEC_D11N_SB_U (0x2 << 8) /* control lower */
+#define BWFM_CHANSPEC_D11N_SB_N (0x3 << 8) /* none */
+#define BWFM_CHANSPEC_D11N_SB_MASK (0x3 << 8)
+#define BWFM_CHANSPEC_D11N_SB_SHIFT 8
+#define BWFM_CHANSPEC_D11N_BW_10 (0x1 << 10)
+#define BWFM_CHANSPEC_D11N_BW_20 (0x2 << 10)
+#define BWFM_CHANSPEC_D11N_BW_40 (0x3 << 10)
+#define BWFM_CHANSPEC_D11N_BW_MASK (0x3 << 10)
+#define BWFM_CHANSPEC_D11N_BW_SHIFT 10
+#define BWFM_CHANSPEC_D11N_BND_5G (0x1 << 12)
+#define BWFM_CHANSPEC_D11N_BND_2G (0x2 << 12)
+#define BWFM_CHANSPEC_D11N_BND_MASK (0x3 << 12)
+#define BWFM_CHANSPEC_D11N_BND_SHIFT 12
+#define BWFM_CHANSPEC_D11AC_SB_LLL (0x0 << 8)
+#define BWFM_CHANSPEC_D11AC_SB_LLU (0x1 << 8)
+#define BWFM_CHANSPEC_D11AC_SB_LUL (0x2 << 8)
+#define BWFM_CHANSPEC_D11AC_SB_LUU (0x3 << 8)
+#define BWFM_CHANSPEC_D11AC_SB_ULL (0x4 << 8)
+#define BWFM_CHANSPEC_D11AC_SB_ULU (0x5 << 8)
+#define BWFM_CHANSPEC_D11AC_SB_UUL (0x6 << 8)
+#define BWFM_CHANSPEC_D11AC_SB_UUU (0x7 << 8)
+#define BWFM_CHANSPEC_D11AC_SB_MASK (0x7 << 8)
+#define BWFM_CHANSPEC_D11AC_SB_SHIFT 8
+#define BWFM_CHANSPEC_D11AC_BW_5 (0x0 << 11)
+#define BWFM_CHANSPEC_D11AC_BW_10 (0x1 << 11)
+#define BWFM_CHANSPEC_D11AC_BW_20 (0x2 << 11)
+#define BWFM_CHANSPEC_D11AC_BW_40 (0x3 << 11)
+#define BWFM_CHANSPEC_D11AC_BW_80 (0x4 << 11)
+#define BWFM_CHANSPEC_D11AC_BW_160 (0x5 << 11)
+#define BWFM_CHANSPEC_D11AC_BW_8080 (0x6 << 11)
+#define BWFM_CHANSPEC_D11AC_BW_MASK (0x7 << 11)
+#define BWFM_CHANSPEC_D11AC_BW_SHIFT 11
+#define BWFM_CHANSPEC_D11AC_BND_2G (0x0 << 14)
+#define BWFM_CHANSPEC_D11AC_BND_3G (0x1 << 14)
+#define BWFM_CHANSPEC_D11AC_BND_4G (0x2 << 14)
+#define BWFM_CHANSPEC_D11AC_BND_5G (0x3 << 14)
+#define BWFM_CHANSPEC_D11AC_BND_MASK (0x3 << 14)
+#define BWFM_CHANSPEC_D11AC_BND_SHIFT 14
+
+#define BWFM_BAND_AUTO 0
+#define BWFM_BAND_5G 1
+#define BWFM_BAND_2G 2
+#define BWFM_BAND_ALL 3
+
+/* Power Modes */
+#define BWFM_PM_CAM 0
+#define BWFM_PM_PS 1
+#define BWFM_PM_FAST_PS 2
+
/* DCMD commands */
#define BWFM_C_GET_VERSION 1
#define BWFM_C_UP 2
@@ -300,6 +402,9 @@ struct bwfm_scan_params {
uint8_t bss_type;
#define DOT11_BSSTYPE_ANY 2
uint8_t scan_type;
+#define BWFM_SCANTYPE_ACTIVE 0
+#define BWFM_SCANTYPE_PASSIVE 1
+#define BWFM_SCANTYPE_DEFAULT 0xff
uint32_t nprobes;
uint32_t active_time;
uint32_t passive_time;
Index: src/sys/dev/ic/bwfmvar.h
diff -u src/sys/dev/ic/bwfmvar.h:1.1 src/sys/dev/ic/bwfmvar.h:1.2
--- src/sys/dev/ic/bwfmvar.h:1.1 Thu Oct 19 23:58:41 2017
+++ src/sys/dev/ic/bwfmvar.h Fri May 11 07:41:11 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: bwfmvar.h,v 1.1 2017/10/19 23:58:41 jmcneill Exp $ */
+/* $NetBSD: bwfmvar.h,v 1.2 2018/05/11 07:41:11 maya Exp $ */
/* $OpenBSD: bwfmvar.h,v 1.1 2017/10/11 17:19:50 patrick Exp $ */
/*
* Copyright (c) 2010-2016 Broadcom Corporation
@@ -17,6 +17,8 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
+#include <sys/pcq.h>
+
/* Chipcommon Core Chip IDs */
#define BRCM_CC_43143_CHIP_ID 43143
#define BRCM_CC_43235_CHIP_ID 43235
@@ -33,7 +35,9 @@
#define BRCM_CC_4339_CHIP_ID 0x4339
#define BRCM_CC_43430_CHIP_ID 43430
#define BRCM_CC_4345_CHIP_ID 0x4345
+#define BRCM_CC_43465_CHIP_ID 43465
#define BRCM_CC_4350_CHIP_ID 0x4350
+#define BRCM_CC_43525_CHIP_ID 43525
#define BRCM_CC_4354_CHIP_ID 0x4354
#define BRCM_CC_4356_CHIP_ID 0x4356
#define BRCM_CC_43566_CHIP_ID 43566
@@ -46,6 +50,7 @@
#define BRCM_CC_4365_CHIP_ID 0x4365
#define BRCM_CC_4366_CHIP_ID 0x4366
#define BRCM_CC_4371_CHIP_ID 0x4371
+#define CY_CC_4373_CHIP_ID 0x4373
/* Defaults */
#define BWFM_DEFAULT_SCAN_CHANNEL_TIME 40
@@ -87,6 +92,7 @@ struct bwfm_chip {
struct bwfm_bus_ops {
void (*bs_init)(struct bwfm_softc *);
void (*bs_stop)(struct bwfm_softc *);
+ int (*bs_txcheck)(struct bwfm_softc *);
int (*bs_txdata)(struct bwfm_softc *, struct mbuf *);
int (*bs_txctl)(struct bwfm_softc *, char *, size_t);
int (*bs_rxctl)(struct bwfm_softc *, char *, size_t *);
@@ -98,7 +104,7 @@ struct bwfm_buscore_ops {
int (*bc_prepare)(struct bwfm_softc *);
int (*bc_reset)(struct bwfm_softc *);
int (*bc_setup)(struct bwfm_softc *);
- void (*bc_activate)(struct bwfm_softc *, uint32_t);
+ void (*bc_activate)(struct bwfm_softc *, const uint32_t);
};
struct bwfm_proto_ops {
@@ -163,8 +169,15 @@ struct bwfm_softc {
};
void bwfm_attach(struct bwfm_softc *);
+void bwfm_chip_socram_ramsize(struct bwfm_softc *, struct bwfm_core *);
+void bwfm_chip_sysmem_ramsize(struct bwfm_softc *, struct bwfm_core *);
+void bwfm_chip_tcm_ramsize(struct bwfm_softc *, struct bwfm_core *);
+void bwfm_chip_tcm_rambase(struct bwfm_softc *);
+void bwfm_start(struct ifnet *);
int bwfm_detach(struct bwfm_softc *, int);
int bwfm_chip_attach(struct bwfm_softc *);
+int bwfm_chip_set_active(struct bwfm_softc *, uint32_t);
+void bwfm_chip_set_passive(struct bwfm_softc *);
struct bwfm_core *bwfm_chip_get_core(struct bwfm_softc *, int);
struct bwfm_core *bwfm_chip_get_pmu(struct bwfm_softc *);
-void bwfm_rx(struct bwfm_softc *, char *, size_t);
+void bwfm_rx(struct bwfm_softc *, struct mbuf *m);
Index: src/sys/dev/sdmmc/if_bwfm_sdio.c
diff -u src/sys/dev/sdmmc/if_bwfm_sdio.c:1.2 src/sys/dev/sdmmc/if_bwfm_sdio.c:1.3
--- src/sys/dev/sdmmc/if_bwfm_sdio.c:1.2 Sun Mar 11 00:17:28 2018
+++ src/sys/dev/sdmmc/if_bwfm_sdio.c Fri May 11 07:41:11 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bwfm_sdio.c,v 1.2 2018/03/11 00:17:28 khorben Exp $ */
+/* $NetBSD: if_bwfm_sdio.c,v 1.3 2018/05/11 07:41:11 maya Exp $ */
/* $OpenBSD: if_bwfm_sdio.c,v 1.1 2017/10/11 17:19:50 patrick Exp $ */
/*
* Copyright (c) 2010-2016 Broadcom Corporation
@@ -87,6 +87,7 @@ void bwfm_sdio_buscore_write(struct bw
int bwfm_sdio_buscore_prepare(struct bwfm_softc *);
void bwfm_sdio_buscore_activate(struct bwfm_softc *, uint32_t);
+int bwfm_sdio_txcheck(struct bwfm_softc *);
int bwfm_sdio_txdata(struct bwfm_softc *, struct mbuf *);
int bwfm_sdio_txctl(struct bwfm_softc *, char *, size_t);
int bwfm_sdio_rxctl(struct bwfm_softc *, char *, size_t *);
@@ -94,6 +95,7 @@ int bwfm_sdio_rxctl(struct bwfm_softc
struct bwfm_bus_ops bwfm_sdio_bus_ops = {
.bs_init = NULL,
.bs_stop = NULL,
+ .bs_txcheck = bwfm_sdio_txcheck,
.bs_txdata = bwfm_sdio_txdata,
.bs_txctl = bwfm_sdio_txctl,
.bs_rxctl = bwfm_sdio_rxctl,
@@ -405,6 +407,15 @@ bwfm_sdio_buscore_activate(struct bwfm_s
}
int
+bwfm_sdio_txcheck(struct bwfm_softc *bwfm, struct mbuf *m)
+{
+ DPRINTFN(2, ("%s: %s\n", DEVNAME(sc), __func__));
+
+ return 0;
+}
+
+
+int
bwfm_sdio_txdata(struct bwfm_softc *bwfm, struct mbuf *m)
{
#ifdef BWFM_DEBUG
Index: src/sys/dev/usb/if_bwfm_usb.c
diff -u src/sys/dev/usb/if_bwfm_usb.c:1.4 src/sys/dev/usb/if_bwfm_usb.c:1.5
--- src/sys/dev/usb/if_bwfm_usb.c:1.4 Sun Jan 21 13:57:11 2018
+++ src/sys/dev/usb/if_bwfm_usb.c Fri May 11 07:41:11 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bwfm_usb.c,v 1.4 2018/01/21 13:57:11 skrll Exp $ */
+/* $NetBSD: if_bwfm_usb.c,v 1.5 2018/05/11 07:41:11 maya Exp $ */
/* $OpenBSD: if_bwfm_usb.c,v 1.2 2017/10/15 14:55:13 patrick Exp $ */
/*
* Copyright (c) 2010-2016 Broadcom Corporation
@@ -199,16 +199,19 @@ void bwfm_usb_free_rx_list(struct bwfm
int bwfm_usb_alloc_tx_list(struct bwfm_usb_softc *);
void bwfm_usb_free_tx_list(struct bwfm_usb_softc *);
+int bwfm_usb_txcheck(struct bwfm_softc *);
int bwfm_usb_txdata(struct bwfm_softc *, struct mbuf *);
int bwfm_usb_txctl(struct bwfm_softc *, char *, size_t);
int bwfm_usb_rxctl(struct bwfm_softc *, char *, size_t *);
+struct mbuf * bwfm_usb_newbuf(void);
void bwfm_usb_rxeof(struct usbd_xfer *, void *, usbd_status);
void bwfm_usb_txeof(struct usbd_xfer *, void *, usbd_status);
struct bwfm_bus_ops bwfm_usb_bus_ops = {
.bs_init = NULL,
.bs_stop = NULL,
+ .bs_txcheck = bwfm_usb_txcheck,
.bs_txdata = bwfm_usb_txdata,
.bs_txctl = bwfm_usb_txctl,
.bs_rxctl = bwfm_usb_rxctl,
@@ -435,6 +438,26 @@ bwfm_usb_attachhook(device_t self)
}
}
+struct mbuf *
+bwfm_usb_newbuf(void)
+{
+ struct mbuf *m;
+
+ MGETHDR(m, M_DONTWAIT, MT_DATA);
+ if (m == NULL)
+ return (NULL);
+
+ MCLGET(m, M_DONTWAIT);
+ if (!(m->m_flags & M_EXT)) {
+ m_freem(m);
+ return (NULL);
+ }
+
+ m->m_len = m->m_pkthdr.len = MCLBYTES;
+
+ return (m);
+}
+
void
bwfm_usb_rxeof(struct usbd_xfer *xfer, void *priv, usbd_status status)
{
@@ -443,6 +466,7 @@ bwfm_usb_rxeof(struct usbd_xfer *xfer, v
struct bwfm_proto_bcdc_hdr *hdr;
usbd_status error;
uint32_t len, off;
+ struct mbuf *m;
DPRINTFN(2, ("%s: %s status %s\n", DEVNAME(sc), __func__,
usbd_errstr(status)));
@@ -466,8 +490,14 @@ bwfm_usb_rxeof(struct usbd_xfer *xfer, v
len -= hdr->data_offset << 2;
off += hdr->data_offset << 2;
- mutex_enter(&sc->sc_rx_lock);
- bwfm_rx(&sc->sc_sc, &data->buf[off], len);
+ m = bwfm_usb_newbuf();
+ if (m == NULL)
+ goto resubmit;
+
+ memcpy(mtod(m, char *), data->buf + off, len);
+ m->m_len = m->m_pkthdr.len = len;
+ mutex_enter(&sc->sc_rx_lock); /* XXX */
+ bwfm_rx(&sc->sc_sc, m);
mutex_exit(&sc->sc_rx_lock);
resubmit:
@@ -735,6 +765,23 @@ err:
}
int
+bwfm_usb_txcheck(struct bwfm_softc *bwfm)
+{
+ struct bwfm_usb_softc *sc = (void *)bwfm;
+
+ mutex_enter(&sc->sc_tx_lock);
+
+ if (TAILQ_EMPTY(&sc->sc_tx_free_list)) {
+ mutex_exit(&sc->sc_tx_lock);
+ return ENOBUFS;
+ }
+
+ mutex_exit(&sc->sc_tx_lock);
+ return 0;
+}
+
+
+int
bwfm_usb_txdata(struct bwfm_softc *bwfm, struct mbuf *m)
{
struct bwfm_usb_softc *sc = (void *)bwfm;
