Module Name: src
Committed By: hkenken
Date: Tue Jun 5 08:03:29 UTC 2018
Modified Files:
src/sys/arch/arm/broadcom: bcm53xx_board.c
src/sys/arch/arm/cortex: a9tmr.c a9tmr_var.h armperiph.c files.cortex
src/sys/arch/arm/fdt: files.fdt
src/sys/arch/arm/zynq: zynq7000_board.c
src/sys/arch/evbarm/amlogic: amlogic_machdep.c
src/sys/arch/evbarm/beagle: beagle_machdep.c
src/sys/arch/evbarm/conf: BCM5301X BCM56340 CUBOX-I DUOVERO GOLDENGATE
HUMMINGBOARD NITROGEN6X ODROID-C1 PANDABOARD PARALLELLA ZEDBOARD
src/sys/arch/evbarm/gumstix: gumstix_machdep.c
src/sys/dev: DEVNAMES
Added Files:
src/sys/arch/arm/fdt: a9tmr_fdt.c
Log Message:
Rename ARM A9 Global Timer driver name to support fdt.
- Rename a9tmr to arma9tmr.
- Add a9tmr_fdt.c based gtmr_fdt.c.
To generate a diff of this commit:
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/arm/broadcom/bcm53xx_board.c
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/cortex/a9tmr.c
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/cortex/a9tmr_var.h
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/cortex/armperiph.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/cortex/files.cortex
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/fdt/a9tmr_fdt.c
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/fdt/files.fdt
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/zynq/zynq7000_board.c
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/evbarm/amlogic/amlogic_machdep.c
cvs rdiff -u -r1.68 -r1.69 src/sys/arch/evbarm/beagle/beagle_machdep.c
cvs rdiff -u -r1.29 -r1.30 src/sys/arch/evbarm/conf/BCM5301X
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/evbarm/conf/BCM56340 \
src/sys/arch/evbarm/conf/NITROGEN6X
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/evbarm/conf/CUBOX-I
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/evbarm/conf/DUOVERO
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/evbarm/conf/GOLDENGATE
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/evbarm/conf/HUMMINGBOARD \
src/sys/arch/evbarm/conf/PARALLELLA src/sys/arch/evbarm/conf/ZEDBOARD
cvs rdiff -u -r1.22 -r1.23 src/sys/arch/evbarm/conf/ODROID-C1
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/evbarm/conf/PANDABOARD
cvs rdiff -u -r1.58 -r1.59 src/sys/arch/evbarm/gumstix/gumstix_machdep.c
cvs rdiff -u -r1.310 -r1.311 src/sys/dev/DEVNAMES
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/broadcom/bcm53xx_board.c
diff -u src/sys/arch/arm/broadcom/bcm53xx_board.c:1.23 src/sys/arch/arm/broadcom/bcm53xx_board.c:1.24
--- src/sys/arch/arm/broadcom/bcm53xx_board.c:1.23 Thu Oct 20 09:53:07 2016
+++ src/sys/arch/arm/broadcom/bcm53xx_board.c Tue Jun 5 08:03:28 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm53xx_board.c,v 1.23 2016/10/20 09:53:07 skrll Exp $ */
+/* $NetBSD: bcm53xx_board.c,v 1.24 2018/06/05 08:03:28 hkenken Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -35,7 +35,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: bcm53xx_board.c,v 1.23 2016/10/20 09:53:07 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: bcm53xx_board.c,v 1.24 2018/06/05 08:03:28 hkenken Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -615,7 +615,7 @@ bcm53xx_device_register(device_t self, v
* We need to tell the A9 Global/Watchdog Timer
* what frequency it runs at.
*/
- if (device_is_a(self, "a9tmr") || device_is_a(self, "a9wdt")) {
+ if (device_is_a(self, "arma9tmr") || device_is_a(self, "a9wdt")) {
/*
* This clock always runs at (arm_clk div 2) and only goes
* to timers that are part of the A9 MP core subsystem.
Index: src/sys/arch/arm/cortex/a9tmr.c
diff -u src/sys/arch/arm/cortex/a9tmr.c:1.14 src/sys/arch/arm/cortex/a9tmr.c:1.15
--- src/sys/arch/arm/cortex/a9tmr.c:1.14 Fri Jul 24 05:20:01 2015
+++ src/sys/arch/arm/cortex/a9tmr.c Tue Jun 5 08:03:28 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: a9tmr.c,v 1.14 2015/07/24 05:20:01 ryo Exp $ */
+/* $NetBSD: a9tmr.c,v 1.15 2018/06/05 08:03:28 hkenken Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: a9tmr.c,v 1.14 2015/07/24 05:20:01 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: a9tmr.c,v 1.15 2018/06/05 08:03:28 hkenken Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -52,8 +52,6 @@ __KERNEL_RCSID(0, "$NetBSD: a9tmr.c,v 1.
static int a9tmr_match(device_t, cfdata_t, void *);
static void a9tmr_attach(device_t, device_t, void *);
-static int clockhandler(void *);
-
static u_int a9tmr_get_timecount(struct timecounter *);
static struct a9tmr_softc a9tmr_sc;
@@ -69,7 +67,7 @@ static struct timecounter a9tmr_timecoun
.tc_next = NULL,
};
-CFATTACH_DECL_NEW(a9tmr, 0, a9tmr_match, a9tmr_attach, NULL, NULL);
+CFATTACH_DECL_NEW(arma9tmr, 0, a9tmr_match, a9tmr_attach, NULL, NULL);
static inline uint32_t
a9tmr_global_read(struct a9tmr_softc *sc, bus_size_t o)
@@ -126,7 +124,10 @@ a9tmr_attach(device_t parent, device_t s
* This runs at the ARM PERIPHCLOCK which should be 1/2 of the CPU clock.
* The MD code should have setup our frequency for us.
*/
- prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq);
+ if (!prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq)) {
+ dict = device_properties(parent);
+ prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq);
+ }
humanize_number(freqbuf, sizeof(freqbuf), sc->sc_freq, "Hz", 1000);
@@ -153,12 +154,14 @@ a9tmr_attach(device_t parent, device_t s
bus_space_subregion(sc->sc_memt, sc->sc_memh,
TMR_WDOG_BASE, TMR_WDOG_SIZE, &sc->sc_wdog_memh);
- sc->sc_global_ih = intr_establish(IRQ_A9TMR_PPI_GTIMER, IPL_CLOCK,
- IST_EDGE | IST_MPSAFE, clockhandler, NULL);
- if (sc->sc_global_ih == NULL)
- panic("%s: unable to register timer interrupt", __func__);
- aprint_normal_dev(sc->sc_dev, "interrupting on irq %d\n",
- IRQ_A9TMR_PPI_GTIMER);
+ if (mpcaa->mpcaa_irq != -1) {
+ sc->sc_global_ih = intr_establish(mpcaa->mpcaa_irq, IPL_CLOCK,
+ IST_EDGE | IST_MPSAFE, a9tmr_intr, NULL);
+ if (sc->sc_global_ih == NULL)
+ panic("%s: unable to register timer interrupt", __func__);
+ aprint_normal_dev(sc->sc_dev, "interrupting on irq %d\n",
+ mpcaa->mpcaa_irq);
+ }
}
static inline uint64_t
@@ -241,7 +244,7 @@ a9tmr_init_cpu_clock(struct cpu_info *ci
}
void
-cpu_initclocks(void)
+a9tmr_cpu_initclocks(void)
{
struct a9tmr_softc * const sc = &a9tmr_sc;
@@ -312,12 +315,12 @@ a9tmr_delay(unsigned int n)
}
/*
- * clockhandler:
+ * a9tmr_intr:
*
* Handle the hardclock interrupt.
*/
-static int
-clockhandler(void *arg)
+int
+a9tmr_intr(void *arg)
{
struct clockframe * const cf = arg;
struct a9tmr_softc * const sc = &a9tmr_sc;
Index: src/sys/arch/arm/cortex/a9tmr_var.h
diff -u src/sys/arch/arm/cortex/a9tmr_var.h:1.4 src/sys/arch/arm/cortex/a9tmr_var.h:1.5
--- src/sys/arch/arm/cortex/a9tmr_var.h:1.4 Fri Jan 2 21:58:03 2015
+++ src/sys/arch/arm/cortex/a9tmr_var.h Tue Jun 5 08:03:28 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: a9tmr_var.h,v 1.4 2015/01/02 21:58:03 jmcneill Exp $ */
+/* $NetBSD: a9tmr_var.h,v 1.5 2018/06/05 08:03:28 hkenken Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -45,8 +45,15 @@ struct a9tmr_softc {
};
#ifdef _KERNEL
+#include "opt_arm_timer.h"
struct cpu_info;
void a9tmr_init_cpu_clock(struct cpu_info *);
+#ifdef __HAVE_GENERIC_CPU_INITCLOCKS
+void a9tmr_cpu_initclocks(void);
+#else
+#define a9tmr_cpu_initclocks cpu_initclocks
+#endif
+int a9tmr_intr(void *);
void a9tmr_update_freq(uint32_t);
void a9tmr_delay(unsigned int n);
#endif
Index: src/sys/arch/arm/cortex/armperiph.c
diff -u src/sys/arch/arm/cortex/armperiph.c:1.12 src/sys/arch/arm/cortex/armperiph.c:1.13
--- src/sys/arch/arm/cortex/armperiph.c:1.12 Fri Dec 29 11:06:26 2017
+++ src/sys/arch/arm/cortex/armperiph.c Tue Jun 5 08:03:28 2018
@@ -31,7 +31,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: armperiph.c,v 1.12 2017/12/29 11:06:26 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: armperiph.c,v 1.13 2018/06/05 08:03:28 hkenken Exp $");
#include <sys/param.h>
#include <sys/device.h>
@@ -62,11 +62,11 @@ struct armperiph_info {
#ifdef CPU_CORTEXA5
static const struct armperiph_info a5_devices[] = {
- { "armscu", 0x0000, 0 },
- { "armgic", 0x1000, 0x0100 },
- { "a9tmr", 0x0200, 0 },
- { "a9wdt", 0x0600, 0 },
- { "arml2cc", 0, 0 }, /* external; needs "offset" property */
+ { "armscu", 0x0000, 0 },
+ { "armgic", 0x1000, 0x0100 },
+ { "arma9tmr", 0x0200, 0 },
+ { "a9wdt", 0x0600, 0 },
+ { "arml2cc", 0, 0 }, /* external; needs "offset" property */
{ "", 0, 0 },
};
#endif
@@ -81,11 +81,11 @@ static const struct armperiph_info a7_de
#ifdef CPU_CORTEXA9
static const struct armperiph_info a9_devices[] = {
- { "armscu", 0x0000, 0 },
- { "arml2cc", 0x2000, 0 },
- { "armgic", 0x1000, 0x0100 },
- { "a9tmr", 0x0200, 0 },
- { "a9wdt", 0x0600, 0 },
+ { "armscu", 0x0000, 0 },
+ { "arml2cc", 0x2000, 0 },
+ { "armgic", 0x1000, 0x0100 },
+ { "arma9tmr", 0x0200, 0 },
+ { "a9wdt", 0x0600, 0 },
{ "", 0, 0 },
};
#endif
@@ -229,6 +229,10 @@ armperiph_attach(device_t parent, device
.mpcaa_off1 = cfg->cfg_devices[i].pi_off1,
.mpcaa_off2 = cfg->cfg_devices[i].pi_off2,
};
+#if defined(CPU_CORTEXA9)
+ if (strcmp(mpcaa.mpcaa_name, "arma9tmr") == 0)
+ mpcaa.mpcaa_irq = IRQ_A9TMR_PPI_GTIMER;
+#endif
#if defined(CPU_CORTEXA7) || defined(CPU_CORTEXA15) || defined(CPU_CORTEXA57)
if (strcmp(mpcaa.mpcaa_name, "armgtmr") == 0) {
mpcaa.mpcaa_irq = IRQ_GTMR_PPI_VTIMER;
Index: src/sys/arch/arm/cortex/files.cortex
diff -u src/sys/arch/arm/cortex/files.cortex:1.6 src/sys/arch/arm/cortex/files.cortex:1.7
--- src/sys/arch/arm/cortex/files.cortex:1.6 Sun May 28 00:32:46 2017
+++ src/sys/arch/arm/cortex/files.cortex Tue Jun 5 08:03:28 2018
@@ -1,4 +1,4 @@
-# $NetBSD: files.cortex,v 1.6 2017/05/28 00:32:46 jmcneill Exp $
+# $NetBSD: files.cortex,v 1.7 2018/06/05 08:03:28 hkenken Exp $
defflag opt_cpu_in_cksum.h NEON_IN_CKSUM
@@ -27,9 +27,9 @@ attach armgtmr at mpcorebus
file arch/arm/cortex/gtmr.c armgtmr
# A9 MPCore Global Timer
-device a9tmr
-attach a9tmr at mpcorebus
-file arch/arm/cortex/a9tmr.c a9tmr
+device arma9tmr
+attach arma9tmr at mpcorebus
+file arch/arm/cortex/a9tmr.c arma9tmr
# A9 MPcore Watchdog Timer
device a9wdt: sysmon_wdog
Index: src/sys/arch/arm/fdt/files.fdt
diff -u src/sys/arch/arm/fdt/files.fdt:1.15 src/sys/arch/arm/fdt/files.fdt:1.16
--- src/sys/arch/arm/fdt/files.fdt:1.15 Mon Feb 19 16:10:42 2018
+++ src/sys/arch/arm/fdt/files.fdt Tue Jun 5 08:03:28 2018
@@ -1,4 +1,4 @@
-# $NetBSD: files.fdt,v 1.15 2018/02/19 16:10:42 jmcneill Exp $
+# $NetBSD: files.fdt,v 1.16 2018/06/05 08:03:28 hkenken Exp $
include "dev/pckbport/files.pckbport"
@@ -13,6 +13,10 @@ device cpufreqdt
attach cpufreqdt at cpu with cpufreq_dt
file dev/fdt/cpufreq_dt.c cpufreq_dt
+device a9tmr: mpcorebus
+attach a9tmr at fdt with a9tmr_fdt
+file arch/arm/fdt/a9tmr_fdt.c a9tmr_fdt
+
device gtmr: mpcorebus
attach gtmr at fdt with gtmr_fdt
file arch/arm/fdt/gtmr_fdt.c gtmr_fdt
Index: src/sys/arch/arm/zynq/zynq7000_board.c
diff -u src/sys/arch/arm/zynq/zynq7000_board.c:1.2 src/sys/arch/arm/zynq/zynq7000_board.c:1.3
--- src/sys/arch/arm/zynq/zynq7000_board.c:1.2 Thu Oct 20 09:53:07 2016
+++ src/sys/arch/arm/zynq/zynq7000_board.c Tue Jun 5 08:03:28 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: zynq7000_board.c,v 1.2 2016/10/20 09:53:07 skrll Exp $ */
+/* $NetBSD: zynq7000_board.c,v 1.3 2018/06/05 08:03:28 hkenken Exp $ */
/*-
* Copyright (c) 2015 Genetec Corporation. All rights reserved.
* Written by Hashimoto Kenichi for Genetec Corporation.
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: zynq7000_board.c,v 1.2 2016/10/20 09:53:07 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: zynq7000_board.c,v 1.3 2018/06/05 08:03:28 hkenken Exp $");
#include "opt_zynq.h"
#include "arml2cc.h"
@@ -124,7 +124,7 @@ zynq7000_device_register(device_t self,
* We need to tell the A9 Global/Watchdog Timer
* what frequency it runs at.
*/
- if (device_is_a(self, "a9tmr") || device_is_a(self, "a9wdt")) {
+ if (device_is_a(self, "arma9tmr") || device_is_a(self, "a9wdt")) {
prop_dictionary_set_uint32(dict, "frequency",
666666666 / PERIPHCLK_N);
return;
Index: src/sys/arch/evbarm/amlogic/amlogic_machdep.c
diff -u src/sys/arch/evbarm/amlogic/amlogic_machdep.c:1.21 src/sys/arch/evbarm/amlogic/amlogic_machdep.c:1.22
--- src/sys/arch/evbarm/amlogic/amlogic_machdep.c:1.21 Sat Aug 8 13:54:05 2015
+++ src/sys/arch/evbarm/amlogic/amlogic_machdep.c Tue Jun 5 08:03:28 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: amlogic_machdep.c,v 1.21 2015/08/08 13:54:05 jmcneill Exp $ */
+/* $NetBSD: amlogic_machdep.c,v 1.22 2018/06/05 08:03:28 hkenken Exp $ */
/*
* Machine dependent functions for kernel setup for TI OSK5912 board.
@@ -125,7 +125,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amlogic_machdep.c,v 1.21 2015/08/08 13:54:05 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amlogic_machdep.c,v 1.22 2018/06/05 08:03:28 hkenken Exp $");
#include "opt_machdep.h"
#include "opt_ddb.h"
@@ -525,7 +525,7 @@ amlogic_device_register(device_t self, v
* We need to tell the A9 Global/Watchdog Timer
* what frequency it runs at.
*/
- if (device_is_a(self, "a9tmr") || device_is_a(self, "a9wdt")) {
+ if (device_is_a(self, "arma9tmr") || device_is_a(self, "a9wdt")) {
prop_dictionary_set_uint32(dict, "frequency",
amlogic_get_rate_a9periph());
Index: src/sys/arch/evbarm/beagle/beagle_machdep.c
diff -u src/sys/arch/evbarm/beagle/beagle_machdep.c:1.68 src/sys/arch/evbarm/beagle/beagle_machdep.c:1.69
--- src/sys/arch/evbarm/beagle/beagle_machdep.c:1.68 Thu Oct 20 09:53:08 2016
+++ src/sys/arch/evbarm/beagle/beagle_machdep.c Tue Jun 5 08:03:28 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: beagle_machdep.c,v 1.68 2016/10/20 09:53:08 skrll Exp $ */
+/* $NetBSD: beagle_machdep.c,v 1.69 2018/06/05 08:03:28 hkenken Exp $ */
/*
* Machine dependent functions for kernel setup for TI OSK5912 board.
@@ -125,7 +125,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: beagle_machdep.c,v 1.68 2016/10/20 09:53:08 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: beagle_machdep.c,v 1.69 2018/06/05 08:03:28 hkenken Exp $");
#include "opt_machdep.h"
#include "opt_ddb.h"
@@ -981,7 +981,7 @@ beagle_device_register(device_t self, vo
* We need to tell the A9 Global/Watchdog Timer
* what frequency it runs at.
*/
- if (device_is_a(self, "a9tmr") || device_is_a(self, "a9wdt")) {
+ if (device_is_a(self, "arma9tmr") || device_is_a(self, "a9wdt")) {
/*
* This clock always runs at (arm_clk div 2) and only goes
* to timers that are part of the A9 MP core subsystem.
Index: src/sys/arch/evbarm/conf/BCM5301X
diff -u src/sys/arch/evbarm/conf/BCM5301X:1.29 src/sys/arch/evbarm/conf/BCM5301X:1.30
--- src/sys/arch/evbarm/conf/BCM5301X:1.29 Thu Sep 14 07:58:40 2017
+++ src/sys/arch/evbarm/conf/BCM5301X Tue Jun 5 08:03:28 2018
@@ -1,5 +1,5 @@
#
-# $NetBSD: BCM5301X,v 1.29 2017/09/14 07:58:40 mrg Exp $
+# $NetBSD: BCM5301X,v 1.30 2018/06/05 08:03:28 hkenken Exp $
#
# BCM5301X -- Broadcom BCM5301X Eval Board Kernel
#
@@ -171,7 +171,7 @@ cpu0 at mainbus?
armperiph0 at mainbus? # A9 On-Chip Peripherals
armgic0 at armperiph? # ARM Generic Interrupt Controller
arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC
-a9tmr0 at armperiph? # A9 Global Timer
+arma9tmr0 at armperiph? # A9 Global Timer
a9wdt0 at armperiph? flags 1 # A9 Watchdog Timer
# ChipCommonA Peripherals
Index: src/sys/arch/evbarm/conf/BCM56340
diff -u src/sys/arch/evbarm/conf/BCM56340:1.14 src/sys/arch/evbarm/conf/BCM56340:1.15
--- src/sys/arch/evbarm/conf/BCM56340:1.14 Thu Sep 14 07:58:40 2017
+++ src/sys/arch/evbarm/conf/BCM56340 Tue Jun 5 08:03:28 2018
@@ -1,5 +1,5 @@
#
-# $NetBSD: BCM56340,v 1.14 2017/09/14 07:58:40 mrg Exp $
+# $NetBSD: BCM56340,v 1.15 2018/06/05 08:03:28 hkenken Exp $
#
# BCM5301X -- Broadcom BCM5301X Eval Board Kernel
#
@@ -171,7 +171,7 @@ cpu0 at mainbus?
armperiph0 at mainbus? # A9 On-Chip Peripherals
armgic0 at armperiph? # ARM Generic Interrupt Controller
arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC
-a9tmr0 at armperiph? # A9 Global Timer
+arma9tmr0 at armperiph? # A9 Global Timer
a9wdt0 at armperiph? flags 1 # A9 Watchdog Timer
# ChipCommonA Peripherals
Index: src/sys/arch/evbarm/conf/NITROGEN6X
diff -u src/sys/arch/evbarm/conf/NITROGEN6X:1.14 src/sys/arch/evbarm/conf/NITROGEN6X:1.15
--- src/sys/arch/evbarm/conf/NITROGEN6X:1.14 Thu Nov 9 05:57:23 2017
+++ src/sys/arch/evbarm/conf/NITROGEN6X Tue Jun 5 08:03:28 2018
@@ -1,4 +1,4 @@
-# $NetBSD: NITROGEN6X,v 1.14 2017/11/09 05:57:23 hkenken Exp $
+# $NetBSD: NITROGEN6X,v 1.15 2018/06/05 08:03:28 hkenken Exp $
#
# Nitrogen6X
# - http://boundarydevices.com/products/nitrogen6x-board-imx6-arm-cortex-a9-sbc/
@@ -187,7 +187,7 @@ cpu* at mainbus?
armperiph0 at mainbus? # A9 On-Chip Peripherals
armgic0 at armperiph? # ARM Generic Interrupt Controller
arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC
-a9tmr0 at armperiph? # A9 Global Timer
+arma9tmr0 at armperiph? # A9 Global Timer
#a9wdt0 at armperiph? flags 0 # A9 Watchdog Timer
axi0 at mainbus?
Index: src/sys/arch/evbarm/conf/CUBOX-I
diff -u src/sys/arch/evbarm/conf/CUBOX-I:1.12 src/sys/arch/evbarm/conf/CUBOX-I:1.13
--- src/sys/arch/evbarm/conf/CUBOX-I:1.12 Thu Nov 9 05:57:23 2017
+++ src/sys/arch/evbarm/conf/CUBOX-I Tue Jun 5 08:03:28 2018
@@ -1,4 +1,4 @@
-# $NetBSD: CUBOX-I,v 1.12 2017/11/09 05:57:23 hkenken Exp $
+# $NetBSD: CUBOX-I,v 1.13 2018/06/05 08:03:28 hkenken Exp $
#
# CuBox-i
# - http://www.solid-run.com/products/cubox-i-mini-computer/
@@ -198,7 +198,7 @@ cpu* at mainbus?
armperiph0 at mainbus? # A9 On-Chip Peripherals
armgic0 at armperiph? # ARM Generic Interrupt Controller
arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC
-a9tmr0 at armperiph? # A9 Global Timer
+arma9tmr0 at armperiph? # A9 Global Timer
#a9wdt0 at armperiph? flags 0 # A9 Watchdog Timer
axi0 at mainbus?
Index: src/sys/arch/evbarm/conf/DUOVERO
diff -u src/sys/arch/evbarm/conf/DUOVERO:1.7 src/sys/arch/evbarm/conf/DUOVERO:1.8
--- src/sys/arch/evbarm/conf/DUOVERO:1.7 Tue Mar 13 06:21:59 2018
+++ src/sys/arch/evbarm/conf/DUOVERO Tue Jun 5 08:03:28 2018
@@ -1,5 +1,5 @@
#
-# $NetBSD: DUOVERO,v 1.7 2018/03/13 06:21:59 ryo Exp $
+# $NetBSD: DUOVERO,v 1.8 2018/06/05 08:03:28 hkenken Exp $
#
# DUOOVERO -- Gumstix. Inc. DuoVero COMS platforms kernel
#
@@ -155,7 +155,7 @@ cpu* at mainbus?
armperiph0 at mainbus?
arml2cc0 at armperiph? # L2 Cache Controller
armgic0 at armperiph? # Interrupt Controller
-a9tmr0 at armperiph? # Global Timer
+arma9tmr0 at armperiph? # Global Timer
a9wdt0 at armperiph? # Watchdog
# L3 Interconnect
Index: src/sys/arch/evbarm/conf/GOLDENGATE
diff -u src/sys/arch/evbarm/conf/GOLDENGATE:1.16 src/sys/arch/evbarm/conf/GOLDENGATE:1.17
--- src/sys/arch/evbarm/conf/GOLDENGATE:1.16 Thu Sep 14 07:58:40 2017
+++ src/sys/arch/evbarm/conf/GOLDENGATE Tue Jun 5 08:03:28 2018
@@ -1,5 +1,5 @@
#
-# $NetBSD: GOLDENGATE,v 1.16 2017/09/14 07:58:40 mrg Exp $
+# $NetBSD: GOLDENGATE,v 1.17 2018/06/05 08:03:28 hkenken Exp $
#
# GOLDENGATE -- Cortina GOLDENGATE Eval Board Kernel
#
@@ -167,7 +167,7 @@ cpu0 at mainbus?
armperiph0 at mainbus? # A9 On-Chip Peripherals
armgic0 at armperiph? # ARM Generic Interrupt Controller
arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC
-a9tmr0 at armperiph? # A9 Global Timer
+arma9tmr0 at armperiph? # A9 Global Timer
a9wdt0 at armperiph? flags 1 # A9 Watchdog Timer
# Peripherals
Index: src/sys/arch/evbarm/conf/HUMMINGBOARD
diff -u src/sys/arch/evbarm/conf/HUMMINGBOARD:1.3 src/sys/arch/evbarm/conf/HUMMINGBOARD:1.4
--- src/sys/arch/evbarm/conf/HUMMINGBOARD:1.3 Sat Nov 25 04:53:24 2017
+++ src/sys/arch/evbarm/conf/HUMMINGBOARD Tue Jun 5 08:03:28 2018
@@ -1,5 +1,5 @@
#
-# $NetBSD: HUMMINGBOARD,v 1.3 2017/11/25 04:53:24 christos Exp $
+# $NetBSD: HUMMINGBOARD,v 1.4 2018/06/05 08:03:28 hkenken Exp $
#
# Hummingboard -- Freescale i.MX6 Eval Board Kernel
#
@@ -54,7 +54,7 @@ cpu* at mainbus?
armperiph0 at mainbus? # A9 On-Chip Peripherals
armgic0 at armperiph? # ARM Generic Interrupt Controller
arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC
-a9tmr0 at armperiph? # A9 Global Timer
+arma9tmr0 at armperiph? # A9 Global Timer
#a9wdt0 at armperiph? flags 0 # A9 Watchdog Timer
axi0 at mainbus?
Index: src/sys/arch/evbarm/conf/PARALLELLA
diff -u src/sys/arch/evbarm/conf/PARALLELLA:1.3 src/sys/arch/evbarm/conf/PARALLELLA:1.4
--- src/sys/arch/evbarm/conf/PARALLELLA:1.3 Sat Nov 25 04:53:24 2017
+++ src/sys/arch/evbarm/conf/PARALLELLA Tue Jun 5 08:03:28 2018
@@ -1,5 +1,5 @@
#
-# $NetBSD: PARALLELLA,v 1.3 2017/11/25 04:53:24 christos Exp $
+# $NetBSD: PARALLELLA,v 1.4 2018/06/05 08:03:28 hkenken Exp $
#
# Parallella -- Xilinx Zynq Eval Board Kernel
#
@@ -58,7 +58,7 @@ cpu* at mainbus?
armperiph0 at mainbus? # A9 On-Chip Peripherals
armgic0 at armperiph? # ARM Generic Interrupt Controller
arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC
-a9tmr0 at armperiph? # A9 Global Timer
+arma9tmr0 at armperiph? # A9 Global Timer
#a9wdt0 at armperiph? flags 0 # A9 Watchdog Timer
axi0 at mainbus?
Index: src/sys/arch/evbarm/conf/ZEDBOARD
diff -u src/sys/arch/evbarm/conf/ZEDBOARD:1.3 src/sys/arch/evbarm/conf/ZEDBOARD:1.4
--- src/sys/arch/evbarm/conf/ZEDBOARD:1.3 Sat Nov 25 04:53:24 2017
+++ src/sys/arch/evbarm/conf/ZEDBOARD Tue Jun 5 08:03:28 2018
@@ -1,5 +1,5 @@
#
-# $NetBSD: ZEDBOARD,v 1.3 2017/11/25 04:53:24 christos Exp $
+# $NetBSD: ZEDBOARD,v 1.4 2018/06/05 08:03:28 hkenken Exp $
#
# ZedBoard -- Xilinx Zynq Eval Board Kernel
#
@@ -57,7 +57,7 @@ cpu* at mainbus?
armperiph0 at mainbus? # A9 On-Chip Peripherals
armgic0 at armperiph? # ARM Generic Interrupt Controller
arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC
-a9tmr0 at armperiph? # A9 Global Timer
+arma9tmr0 at armperiph? # A9 Global Timer
#a9wdt0 at armperiph? flags 0 # A9 Watchdog Timer
axi0 at mainbus?
Index: src/sys/arch/evbarm/conf/ODROID-C1
diff -u src/sys/arch/evbarm/conf/ODROID-C1:1.22 src/sys/arch/evbarm/conf/ODROID-C1:1.23
--- src/sys/arch/evbarm/conf/ODROID-C1:1.22 Mon Mar 20 14:06:43 2017
+++ src/sys/arch/evbarm/conf/ODROID-C1 Tue Jun 5 08:03:28 2018
@@ -1,5 +1,5 @@
#
-# $NetBSD: ODROID-C1,v 1.22 2017/03/20 14:06:43 skrll Exp $
+# $NetBSD: ODROID-C1,v 1.23 2018/06/05 08:03:28 hkenken Exp $
#
# Hardkernel ODROID-C1 (Amlogic S805) based SBC (Single Board Computer)
#
@@ -24,7 +24,7 @@ cpu* at mainbus?
armperiph0 at mainbus?
arml2cc0 at armperiph? # L2 Cache Controller
armgic0 at armperiph? # Interrupt Controller
-a9tmr0 at armperiph? # Global Timer
+arma9tmr0 at armperiph? # Global Timer
a9wdt0 at armperiph? # Watchdog
# On-board I/O
Index: src/sys/arch/evbarm/conf/PANDABOARD
diff -u src/sys/arch/evbarm/conf/PANDABOARD:1.24 src/sys/arch/evbarm/conf/PANDABOARD:1.25
--- src/sys/arch/evbarm/conf/PANDABOARD:1.24 Thu Sep 14 07:58:40 2017
+++ src/sys/arch/evbarm/conf/PANDABOARD Tue Jun 5 08:03:28 2018
@@ -1,5 +1,5 @@
#
-# $NetBSD: PANDABOARD,v 1.24 2017/09/14 07:58:40 mrg Exp $
+# $NetBSD: PANDABOARD,v 1.25 2018/06/05 08:03:28 hkenken Exp $
#
# PANDABOARD -- TI OMAP 4430 Eval Board Kernel
#
@@ -153,7 +153,7 @@ cpu0 at mainbus?
armperiph0 at mainbus?
arml2cc0 at armperiph? # L2 Cache Controller
armgic0 at armperiph? # Interrupt Controller
-a9tmr0 at armperiph? # Global Timer
+arma9tmr0 at armperiph? # Global Timer
a9wdt0 at armperiph? # Watchdog
# Specify the memory size in megabytes.
Index: src/sys/arch/evbarm/gumstix/gumstix_machdep.c
diff -u src/sys/arch/evbarm/gumstix/gumstix_machdep.c:1.58 src/sys/arch/evbarm/gumstix/gumstix_machdep.c:1.59
--- src/sys/arch/evbarm/gumstix/gumstix_machdep.c:1.58 Wed Mar 1 16:44:54 2017
+++ src/sys/arch/evbarm/gumstix/gumstix_machdep.c Tue Jun 5 08:03:28 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: gumstix_machdep.c,v 1.58 2017/03/01 16:44:54 skrll Exp $ */
+/* $NetBSD: gumstix_machdep.c,v 1.59 2018/06/05 08:03:28 hkenken Exp $ */
/*
* Copyright (C) 2005, 2006, 2007 WIDE Project and SOUM Corporation.
* All rights reserved.
@@ -1051,7 +1051,7 @@ gumstix_device_register(device_t dev, vo
{
prop_dictionary_t dict = device_properties(dev);
- if (device_is_a(dev, "a9tmr") ||
+ if (device_is_a(dev, "arma9tmr") ||
device_is_a(dev, "a9wdt")) {
/*
* We need to tell the A9 Global/Watchdog Timer
Index: src/sys/dev/DEVNAMES
diff -u src/sys/dev/DEVNAMES:1.310 src/sys/dev/DEVNAMES:1.311
--- src/sys/dev/DEVNAMES:1.310 Mon Apr 9 20:16:53 2018
+++ src/sys/dev/DEVNAMES Tue Jun 5 08:03:29 2018
@@ -1,4 +1,4 @@
-# $NetBSD: DEVNAMES,v 1.310 2018/04/09 20:16:53 christos Exp $
+# $NetBSD: DEVNAMES,v 1.311 2018/06/05 08:03:29 hkenken Exp $
#
# This file contains all used device names and defined attributes in
# alphabetical order. New devices added to the system somewhere should first
@@ -13,7 +13,6 @@ a2kbbc amiga
a2kbbc amigappc
a34kbbc amiga
a34kbbc amigappc
-a9tmr arm
a9wdt arm
aac MI
abtn macppc
@@ -90,6 +89,7 @@ arbus evbmips
arc MI Attribute
arcmsr MI
aria MI
+arma9tmr arm
armgic arm
arml2cc arm
armperiph arm
Added files:
Index: src/sys/arch/arm/fdt/a9tmr_fdt.c
diff -u /dev/null src/sys/arch/arm/fdt/a9tmr_fdt.c:1.1
--- /dev/null Tue Jun 5 08:03:29 2018
+++ src/sys/arch/arm/fdt/a9tmr_fdt.c Tue Jun 5 08:03:28 2018
@@ -0,0 +1,129 @@
+/* $NetBSD: a9tmr_fdt.c,v 1.1 2018/06/05 08:03:28 hkenken Exp $ */
+
+/*-
+ * Copyright (c) 2017 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: a9tmr_fdt.c,v 1.1 2018/06/05 08:03:28 hkenken Exp $");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/device.h>
+#include <sys/intr.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/kmem.h>
+
+#include <arm/cortex/a9tmr_intr.h>
+#include <arm/cortex/mpcore_var.h>
+#include <arm/cortex/a9tmr_var.h>
+
+#include <dev/fdt/fdtvar.h>
+#include <arm/fdt/arm_fdtvar.h>
+
+static int a9tmr_fdt_match(device_t, cfdata_t, void *);
+static void a9tmr_fdt_attach(device_t, device_t, void *);
+
+static void a9tmr_fdt_cpu_hatch(void *, struct cpu_info *);
+
+CFATTACH_DECL_NEW(a9tmr_fdt, 0, a9tmr_fdt_match, a9tmr_fdt_attach, NULL, NULL);
+
+static int
+a9tmr_fdt_match(device_t parent, cfdata_t cf, void *aux)
+{
+ const char * const compatible[] = {
+ "arm,cortex-a9-global-timer",
+ NULL
+ };
+ struct fdt_attach_args * const faa = aux;
+
+ return of_compatible(faa->faa_phandle, compatible) >= 0;
+}
+
+static void
+a9tmr_fdt_attach(device_t parent, device_t self, void *aux)
+{
+ struct fdt_attach_args * const faa = aux;
+ const int phandle = faa->faa_phandle;
+ bus_space_handle_t bsh;
+
+ struct clk *clk = fdtbus_clock_get_index(phandle, 0);
+ if (clk == NULL) {
+ aprint_error(": couldn't get clock\n");
+ return;
+ }
+ if (clk_enable(clk) != 0) {
+ aprint_error(": couldn't enable clock\n");
+ return;
+ }
+
+ uint32_t rate = clk_get_rate(clk);
+ prop_dictionary_t dict = device_properties(self);
+ prop_dictionary_set_uint32(dict, "frequency", rate);
+
+ char intrstr[128];
+ if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
+ aprint_error(": failed to decode interrupt\n");
+ return;
+ }
+
+ void *ih = fdtbus_intr_establish(phandle, 0, IPL_CLOCK,
+ FDT_INTR_MPSAFE, a9tmr_intr, NULL);
+ if (ih == NULL) {
+ aprint_error_dev(self, "couldn't install interrupt handler\n");
+ return;
+ }
+ aprint_normal_dev(self, "interrupting on %s\n", intrstr);
+
+ bus_addr_t addr;
+ bus_size_t size;
+ if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
+ aprint_error(": couldn't get distributor address\n");
+ return;
+ }
+ if (bus_space_map(faa->faa_bst, addr, size, 0, &bsh)) {
+ aprint_error(": couldn't map registers\n");
+ return;
+ }
+
+ struct mpcore_attach_args mpcaa = {
+ .mpcaa_name = "arma9tmr",
+ .mpcaa_memt = faa->faa_bst,
+ .mpcaa_memh = bsh,
+ .mpcaa_irq = -1,
+ };
+
+ config_found(self, &mpcaa, NULL);
+
+ arm_fdt_cpu_hatch_register(self, a9tmr_fdt_cpu_hatch);
+ arm_fdt_timer_register(a9tmr_cpu_initclocks);
+}
+
+static void
+a9tmr_fdt_cpu_hatch(void *priv, struct cpu_info *ci)
+{
+ a9tmr_init_cpu_clock(ci);
+}
