Module Name:    src
Committed By:   ryo
Date:           Wed Jun 27 11:12:15 UTC 2018

Modified Files:
        src/sys/arch/arm/arm32: genassym.cf
        src/sys/arch/arm/broadcom: bcm283x_platform.c
        src/sys/arch/arm/cortex: a9_mpsubr.S
        src/sys/arch/evbarm/conf: RPI2
        src/sys/arch/evbarm/fdt: fdt_machdep.c
        src/sys/arch/evbarm/rpi: rpi2_start.S rpi_start.S

Log Message:
on evbarm/RPI,RPI2, VERBOSE_INIT_ARM had broken.

XPUTC() of evbarm/rpi/rpi*_start.S uses bcm283[567]_platform_early_putchar() 
and it requires stack.
fixed to allocate stack when starting from rpi*_start.S and a9_mpsubr.S if 
needed.

to work XPUTC(), need to define VERBOSE_INIT_ARM and EARLYCONS option.


To generate a diff of this commit:
cvs rdiff -u -r1.77 -r1.78 src/sys/arch/arm/arm32/genassym.cf
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/broadcom/bcm283x_platform.c
cvs rdiff -u -r1.56 -r1.57 src/sys/arch/arm/cortex/a9_mpsubr.S
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/evbarm/conf/RPI2
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/evbarm/fdt/fdt_machdep.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/evbarm/rpi/rpi2_start.S
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/evbarm/rpi/rpi_start.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm32/genassym.cf
diff -u src/sys/arch/arm/arm32/genassym.cf:1.77 src/sys/arch/arm/arm32/genassym.cf:1.78
--- src/sys/arch/arm/arm32/genassym.cf:1.77	Wed Jan 24 09:04:44 2018
+++ src/sys/arch/arm/arm32/genassym.cf	Wed Jun 27 11:12:14 2018
@@ -1,4 +1,4 @@
-#	$NetBSD: genassym.cf,v 1.77 2018/01/24 09:04:44 skrll Exp $
+#	$NetBSD: genassym.cf,v 1.78 2018/06/27 11:12:14 ryo Exp $
 
 # Copyright (c) 1982, 1990 The Regents of the University of California.
 # All rights reserved.
@@ -150,6 +150,8 @@ define	PAGE_SIZE		PAGE_SIZE
 define	UPAGES			UPAGES
 define	PGSHIFT			PGSHIFT
 
+define	MAXCPUS			MAXCPUS
+
 # Important offsets into the lwp and proc structs & associated constants
 define	L_PCB			offsetof(struct lwp, l_addr)
 define	L_CPU			offsetof(struct lwp, l_cpu)

Index: src/sys/arch/arm/broadcom/bcm283x_platform.c
diff -u src/sys/arch/arm/broadcom/bcm283x_platform.c:1.5 src/sys/arch/arm/broadcom/bcm283x_platform.c:1.6
--- src/sys/arch/arm/broadcom/bcm283x_platform.c:1.5	Fri Jun  8 18:09:43 2018
+++ src/sys/arch/arm/broadcom/bcm283x_platform.c	Wed Jun 27 11:12:14 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: bcm283x_platform.c,v 1.5 2018/06/08 18:09:43 jmcneill Exp $	*/
+/*	$NetBSD: bcm283x_platform.c,v 1.6 2018/06/27 11:12:14 ryo Exp $	*/
 
 /*-
  * Copyright (c) 2017 Jared D. McNeill <jmcne...@invisible.ca>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bcm283x_platform.c,v 1.5 2018/06/08 18:09:43 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm283x_platform.c,v 1.6 2018/06/27 11:12:14 ryo Exp $");
 
 #include "opt_arm_debug.h"
 #include "opt_bcm283x.h"
@@ -819,6 +819,10 @@ bcm2836_bootstrap(void)
 			    __func__, i);
 		}
 	}
+#if defined(VERBOSE_INIT_ARM) && defined(EARLYCONS)
+	/* for viewability of secondary processor's debug outputs */
+	printf("\n");
+#endif
 #endif
 }
 

Index: src/sys/arch/arm/cortex/a9_mpsubr.S
diff -u src/sys/arch/arm/cortex/a9_mpsubr.S:1.56 src/sys/arch/arm/cortex/a9_mpsubr.S:1.57
--- src/sys/arch/arm/cortex/a9_mpsubr.S:1.56	Wed Jun 27 11:05:50 2018
+++ src/sys/arch/arm/cortex/a9_mpsubr.S	Wed Jun 27 11:12:14 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: a9_mpsubr.S,v 1.56 2018/06/27 11:05:50 ryo Exp $	*/
+/*	$NetBSD: a9_mpsubr.S,v 1.57 2018/06/27 11:12:14 ryo Exp $	*/
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -589,6 +589,16 @@ cortex_mpfault:
 	.global	cortex_mpstart
 	.type	cortex_mpstart,%object
 
+#ifdef VERBOSE_INIT_ARM
+	.pushsection .bss
+	/* temporary stack for secondary CPUs (for XPUTC) */
+#define BOOT_STACKSIZE	256
+	.align	3
+	.space	BOOT_STACKSIZE * (MAXCPUS - 1)
+bootstk_cpus:
+	.popsection
+#endif
+
 cortex_mpstart:
 #ifndef MULTIPROCESSOR
 	//
@@ -601,6 +611,21 @@ cortex_mpstart:
 	setend	be				// switch to BE now
 #endif
 
+#ifdef VERBOSE_INIT_ARM
+	mrc	p15, 0, r1, c0, c0, 5		// MPIDR get
+	and	r1, r1, #7			// get our cpu numder
+
+	mov	r0, #BOOT_STACKSIZE
+	mul	r1, r1, r0			// r1 = BOOT_STACKSIZE * cpuid
+
+	movw	r0, #:lower16:bootstk_cpus
+	movt	r0, #:upper16:bootstk_cpus
+#if !defined(KERNEL_BASES_EQUAL)
+	sub	r0, r0, #KERNEL_BASE_VOFFSET
+#endif
+	sub	sp, r0, r1			// sp = bootstk_cpus - r1
+#endif /* VERBOSE_INIT_ARM */
+
 	// We haven't used anything from memory yet so we can invalidate the
 	// L1 cache without fear of losing valuable data.  Afterwards, we can
 	// flush icache without worrying about anything getting written back

Index: src/sys/arch/evbarm/conf/RPI2
diff -u src/sys/arch/evbarm/conf/RPI2:1.4 src/sys/arch/evbarm/conf/RPI2:1.5
--- src/sys/arch/evbarm/conf/RPI2:1.4	Sun Dec 10 21:38:26 2017
+++ src/sys/arch/evbarm/conf/RPI2	Wed Jun 27 11:12:14 2018
@@ -1,5 +1,5 @@
 #
-#	$NetBSD: RPI2,v 1.4 2017/12/10 21:38:26 skrll Exp $
+#	$NetBSD: RPI2,v 1.5 2018/06/27 11:12:14 ryo Exp $
 #
 #	RPi2 -- Raspberry Pi 2
 #
@@ -14,6 +14,11 @@ no options 	__HAVE_MM_MD_CACHE_ALIASING
 no makeoptions	CPUFLAGS
 no makeoptions	DTS
 
+#options 	VERBOSE_INIT_ARM
+# EARLYCONS is required for early init messages from VERBOSE_INIT_ARM.
+#options 	EARLYCONS=bcm2836	# RaspberryPi2
+#options 	EARLYCONS=bcm2837	# RaspberryPi3
+
 options 	SOC_BCM2836
 options 	CPU_CORTEXA7
 options 	MULTIPROCESSOR

Index: src/sys/arch/evbarm/fdt/fdt_machdep.c
diff -u src/sys/arch/evbarm/fdt/fdt_machdep.c:1.23 src/sys/arch/evbarm/fdt/fdt_machdep.c:1.24
--- src/sys/arch/evbarm/fdt/fdt_machdep.c:1.23	Thu Jun 21 11:57:05 2018
+++ src/sys/arch/evbarm/fdt/fdt_machdep.c	Wed Jun 27 11:12:15 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: fdt_machdep.c,v 1.23 2018/06/21 11:57:05 ryo Exp $ */
+/* $NetBSD: fdt_machdep.c,v 1.24 2018/06/27 11:12:15 ryo Exp $ */
 
 /*-
  * Copyright (c) 2015-2017 Jared McNeill <jmcne...@invisible.ca>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fdt_machdep.c,v 1.23 2018/06/21 11:57:05 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fdt_machdep.c,v 1.24 2018/06/27 11:12:15 ryo Exp $");
 
 #include "opt_machdep.h"
 #include "opt_bootconfig.h"
@@ -137,8 +137,9 @@ fdt_putchar(char c)
 	}
 #ifdef EARLYCONS
 	else {
-		void uartputc(int);	/* evbarm/fdt/fdt_start.S */
-		uartputc(c);
+#define PLATFORM_EARLY_PUTCHAR ___CONCAT(EARLYCONS, _platform_early_putchar)
+		void PLATFORM_EARLY_PUTCHAR(char);
+		PLATFORM_EARLY_PUTCHAR(c);
 	}
 #endif
 }

Index: src/sys/arch/evbarm/rpi/rpi2_start.S
diff -u src/sys/arch/evbarm/rpi/rpi2_start.S:1.6 src/sys/arch/evbarm/rpi/rpi2_start.S:1.7
--- src/sys/arch/evbarm/rpi/rpi2_start.S:1.6	Wed Jun 27 11:05:38 2018
+++ src/sys/arch/evbarm/rpi/rpi2_start.S	Wed Jun 27 11:12:15 2018
@@ -34,12 +34,13 @@
 #include "opt_arm_debug.h"
 #include "opt_fdt.h"
 
+#include <sys/cdefs.h>
 #include <arm/asm.h>
 #include <arm/armreg.h>
 
 #include "assym.h"
 
-RCSID("$NetBSD: rpi2_start.S,v 1.6 2018/06/27 11:05:38 ryo Exp $")
+RCSID("$NetBSD: rpi2_start.S,v 1.7 2018/06/27 11:12:15 ryo Exp $")
 
 #if defined(KERNEL_BASES_EQUAL)
 #define CALL(f)		bl	_C_LABEL(f)
@@ -51,10 +52,11 @@ RCSID("$NetBSD: rpi2_start.S,v 1.6 2018/
 	blx	fp
 #endif
 
-#if defined(VERBOSE_INIT_ARM)
-#define	XPUTC(n)	mov r0, n; CALL(bcm2836_platform_early_putchar)
+#if defined(VERBOSE_INIT_ARM) && defined(EARLYCONS)
+#define	PLATFORM_EARLY_PUTCHAR	___CONCAT(EARLYCONS, _platform_early_putchar)
+#define	XPUTC(n)	push {r1-r12, lr}; mov r0, n; CALL(PLATFORM_EARLY_PUTCHAR); pop {r1-r12, lr}
 #if KERNEL_BASE_VOFFSET == 0
-#define	XPUTC2(n)	mov r0, n; CALL(bcm2836_platform_early_putchar)
+#define	XPUTC2(n)	mov r0, n; CALL(PLATFORM_EARLY_PUTCHAR)
 #else
 #define XPUTC2(n)	mov r0, n; blx r11
 #endif
@@ -81,6 +83,15 @@ RCSID("$NetBSD: rpi2_start.S,v 1.6 2018/
 	.global	_C_LABEL(rpi_start)
 _C_LABEL(rpi_start):
 
+#if defined(VERBOSE_INIT_ARM) && defined(EARLYCONS)
+	/* stack for calling bcm283*_platform_early_putchar() */
+	movw	sp, #:lower16:bootstk
+	movt	sp, #:upper16:bootstk
+#if !defined(KERNEL_BASES_EQUAL)
+	sub	sp, sp, #KERNEL_BASE_VOFFSET
+#endif
+#endif /* VERBOSE_INIT_ARM */
+
 #ifdef __ARMEB__
 	setend	be			/* force big endian */
 #endif
@@ -140,9 +151,9 @@ _C_LABEL(rpi_start):
 	 * so setup the lr to be in .text.  Cache the address for
 	 * bcm283x_platform_early_putchar before we go.
 	 */
-#if defined(VERBOSE_INIT_ARM)
-	movw	r11, #:lower16:bcm2836_platform_early_putchar
-	movt	r11, #:upper16:bcm2836_platform_early_putchar
+#if defined(VERBOSE_INIT_ARM) && defined(EARLYCONS)
+	movw	r11, #:lower16:PLATFORM_EARLY_PUTCHAR
+	movt	r11, #:upper16:PLATFORM_EARLY_PUTCHAR
 #endif
 	movw	lr, #:lower16:1f
 	movt	lr, #:upper16:1f
@@ -177,6 +188,14 @@ _C_LABEL(rpi_start):
 	.popsection
 #endif
 
+#if defined(VERBOSE_INIT_ARM) && defined(EARLYCONS)
+	.pushsection .bss
+	.align	3
+	.space	256
+bootstk:
+	.popsection
+#endif
+
 #include <arm/cortex/a9_mpsubr.S>
 
 .Lmmu_init_table:

Index: src/sys/arch/evbarm/rpi/rpi_start.S
diff -u src/sys/arch/evbarm/rpi/rpi_start.S:1.17 src/sys/arch/evbarm/rpi/rpi_start.S:1.18
--- src/sys/arch/evbarm/rpi/rpi_start.S:1.17	Sat Mar  3 13:46:32 2018
+++ src/sys/arch/evbarm/rpi/rpi_start.S	Wed Jun 27 11:12:15 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: rpi_start.S,v 1.17 2018/03/03 13:46:32 skrll Exp $	*/
+/*	$NetBSD: rpi_start.S,v 1.18 2018/06/27 11:12:15 ryo Exp $	*/
 
 /*
  * Copyright (c) 2002, 2003  Genetec Corporation.  All rights reserved.
@@ -96,11 +96,11 @@
 #include <arm/armreg.h>
 #include "assym.h"
 
-RCSID("$NetBSD: rpi_start.S,v 1.17 2018/03/03 13:46:32 skrll Exp $")
+RCSID("$NetBSD: rpi_start.S,v 1.18 2018/06/27 11:12:15 ryo Exp $")
 
 
 #if defined(VERBOSE_INIT_ARM)
-#define	XPUTC(n)	mov r0, n; bl bcm283x_platform_early_putchar
+#define	XPUTC(n)	push {r1-r12, lr}; mov r0, n; bl bcm2835_platform_early_putchar; pop {r1-r12, lr}
 #else
 #define	XPUTC(n)
 #endif
@@ -137,6 +137,15 @@ RCSID("$NetBSD: rpi_start.S,v 1.17 2018/
 
 	.global	_C_LABEL(rpi_start)
 _C_LABEL(rpi_start):
+
+#if defined(VERBOSE_INIT_ARM)
+	/* stack for calling bcm2835_platform_early_putchar() */
+	ldr	sp, Lbootstk
+#if !defined(KERNEL_BASES_EQUAL)
+	sub	sp, sp, #KERNEL_BASE_VOFFSET
+#endif
+#endif /* VERBOSE_INIT_ARM */
+
 	ldr	r8, Luboot_args
 	stmia	r8!, {r0-r3}
 
@@ -345,6 +354,17 @@ Lcontrol_wax:
 Lctl_ID_dis:
 	.word	~(CPU_CONTROL_IC_ENABLE|CPU_CONTROL_DC_ENABLE)
 
+#if defined(VERBOSE_INIT_ARM)
+Lbootstk:
+	.word	bootstk
+
+	.pushsection .bss
+	.align	3
+	.space	256
+bootstk:
+	.popsection
+#endif
+
 /* We'll modify va and pa at run time so we can use relocatable addresses. */
 #define MMU_INIT(va,pa,n_sec,attr) \
 	.word	va					    ; \

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