Module Name: src Committed By: jmcneill Date: Sat Jun 30 12:23:24 UTC 2018
Modified Files: src/sys/arch/arm/dts: sun8i-a83t-bananapi-m3.dts sun8i-a83t.dtsi Log Message: No need to define our own emac node as this is in the upstream dts now. To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/dts/sun8i-a83t-bananapi-m3.dts \ src/sys/arch/arm/dts/sun8i-a83t.dtsi Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Modified files: Index: src/sys/arch/arm/dts/sun8i-a83t-bananapi-m3.dts diff -u src/sys/arch/arm/dts/sun8i-a83t-bananapi-m3.dts:1.1 src/sys/arch/arm/dts/sun8i-a83t-bananapi-m3.dts:1.2 --- src/sys/arch/arm/dts/sun8i-a83t-bananapi-m3.dts:1.1 Sat Oct 28 16:09:14 2017 +++ src/sys/arch/arm/dts/sun8i-a83t-bananapi-m3.dts Sat Jun 30 12:23:24 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: sun8i-a83t-bananapi-m3.dts,v 1.1 2017/10/28 16:09:14 jmcneill Exp $ */ +/* $NetBSD: sun8i-a83t-bananapi-m3.dts,v 1.2 2018/06/30 12:23:24 jmcneill Exp $ */ /*- * Copyright (c) 2017 Jared McNeill <jmcne...@invisible.ca> @@ -28,19 +28,3 @@ #include "../../../external/gpl2/dts/dist/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts" #include "sun8i-a83t.dtsi" - -&emac { - pinctrl-names = "default"; - pinctrl-0 = <&emac_pins_rgmii_a>; - phy-mode = "rgmii"; - phy = <&phy1>; - status = "okay"; - - /* EMAC transmit/receive clock delay chain values for BPI-M3 */ - tx-delay = <0x7>; - rx-delay = <0x7>; - - phy1: ethernet-phy@1 { - reg = <1>; - }; -}; Index: src/sys/arch/arm/dts/sun8i-a83t.dtsi diff -u src/sys/arch/arm/dts/sun8i-a83t.dtsi:1.1 src/sys/arch/arm/dts/sun8i-a83t.dtsi:1.2 --- src/sys/arch/arm/dts/sun8i-a83t.dtsi:1.1 Sat Oct 28 16:09:14 2017 +++ src/sys/arch/arm/dts/sun8i-a83t.dtsi Sat Jun 30 12:23:24 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: sun8i-a83t.dtsi,v 1.1 2017/10/28 16:09:14 jmcneill Exp $ */ +/* $NetBSD: sun8i-a83t.dtsi,v 1.2 2018/06/30 12:23:24 jmcneill Exp $ */ /*- * Copyright (c) 2017 Jared McNeill <jmcne...@invisible.ca> @@ -39,30 +39,4 @@ status = "disabled"; }; }; - - soc { - emac: ethernet@1c30000 { - compatible = "allwinner,sun8i-a83t-emac"; - reg = <0x01c30000 0x104>, <0x01c00030 0x4>; - reg-names = "emac", "syscon"; - interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; - resets = <&ccu RST_BUS_EMAC>; - reset-names = "ahb"; - clocks = <&ccu CLK_BUS_EMAC>; - clock-names = "ahb"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - }; -}; - -&pio { - emac_pins_rgmii_a: emac_rgmii@0 { - pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", - "PD11", "PD12", "PD13", "PD14", - "PD18", "PD19", "PD20", "PD21", "PD22", "PD23"; - function = "emac"; - drive-strength = <40>; - }; };