Module Name: src
Committed By: jmcneill
Date: Sat Jun 30 12:36:13 UTC 2018
Modified Files:
src/sys/arch/arm/sunxi: sunxi_emac.c
Log Message:
Use syscon API instead of mapping syscon registers ourselves.
To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/sunxi/sunxi_emac.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sunxi/sunxi_emac.c
diff -u src/sys/arch/arm/sunxi/sunxi_emac.c:1.15 src/sys/arch/arm/sunxi/sunxi_emac.c:1.16
--- src/sys/arch/arm/sunxi/sunxi_emac.c:1.15 Tue Jun 26 06:47:58 2018
+++ src/sys/arch/arm/sunxi/sunxi_emac.c Sat Jun 30 12:36:13 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_emac.c,v 1.15 2018/06/26 06:47:58 msaitoh Exp $ */
+/* $NetBSD: sunxi_emac.c,v 1.16 2018/06/30 12:36:13 jmcneill Exp $ */
/*-
* Copyright (c) 2016-2017 Jared McNeill <jmcne...@invisible.ca>
@@ -33,7 +33,7 @@
#include "opt_net_mpsafe.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sunxi_emac.c,v 1.15 2018/06/26 06:47:58 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_emac.c,v 1.16 2018/06/30 12:36:13 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -55,6 +55,7 @@ __KERNEL_RCSID(0, "$NetBSD: sunxi_emac.c
#include <dev/mii/miivar.h>
#include <dev/fdt/fdtvar.h>
+#include <dev/fdt/syscon.h>
#include <arm/sunxi/sunxi_emac.h>
@@ -167,12 +168,6 @@ struct sunxi_emac_rxring {
u_int cur;
};
-enum {
- _RES_EMAC,
- _RES_SYSCON,
- _RES_NITEMS
-};
-
struct sunxi_emac_softc {
device_t dev;
int phandle;
@@ -180,7 +175,7 @@ struct sunxi_emac_softc {
bus_space_tag_t bst;
bus_dma_tag_t dmat;
- bus_space_handle_t bsh[_RES_NITEMS];
+ bus_space_handle_t bsh;
struct clk *clk_ahb;
struct clk *clk_ephy;
struct fdtbus_reset *rst_ahb;
@@ -188,6 +183,8 @@ struct sunxi_emac_softc {
struct fdtbus_regulator *reg_phy;
struct fdtbus_gpio_pin *pin_reset;
+ struct syscon *syscon;
+
int phy_id;
kmutex_t mtx;
@@ -202,14 +199,9 @@ struct sunxi_emac_softc {
};
#define RD4(sc, reg) \
- bus_space_read_4((sc)->bst, (sc)->bsh[_RES_EMAC], (reg))
+ bus_space_read_4((sc)->bst, (sc)->bsh, (reg))
#define WR4(sc, reg, val) \
- bus_space_write_4((sc)->bst, (sc)->bsh[_RES_EMAC], (reg), (val))
-
-#define SYSCONRD4(sc, reg) \
- bus_space_read_4((sc)->bst, (sc)->bsh[_RES_SYSCON], (reg))
-#define SYSCONWR4(sc, reg, val) \
- bus_space_write_4((sc)->bst, (sc)->bsh[_RES_SYSCON], (reg), (val))
+ bus_space_write_4((sc)->bst, (sc)->bsh, (reg), (val))
static int
sunxi_emac_mii_readreg(device_t dev, int phy, int reg)
@@ -925,7 +917,8 @@ sunxi_emac_setup_phy(struct sunxi_emac_s
aprint_debug_dev(sc->dev, "PHY type: %s\n", phy_type);
- reg = SYSCONRD4(sc, 0);
+ syscon_lock(sc->syscon);
+ reg = syscon_read_4(sc->syscon, EMAC_CLK_REG);
reg &= ~(EMAC_CLK_PIT | EMAC_CLK_SRC | EMAC_CLK_RMII_EN);
if (strcmp(phy_type, "rgmii") == 0)
@@ -972,7 +965,8 @@ sunxi_emac_setup_phy(struct sunxi_emac_s
aprint_debug_dev(sc->dev, "EMAC clock: 0x%08x\n", reg);
- SYSCONWR4(sc, 0, reg);
+ syscon_write_4(sc->syscon, EMAC_CLK_REG, reg);
+ syscon_unlock(sc->syscon);
return 0;
}
@@ -1298,26 +1292,12 @@ sunxi_emac_get_resources(struct sunxi_em
/* Map EMAC registers */
if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0)
return ENXIO;
- if (bus_space_map(sc->bst, addr, size, 0, &sc->bsh[_RES_EMAC]) != 0)
+ if (bus_space_map(sc->bst, addr, size, 0, &sc->bsh) != 0)
return ENXIO;
- /* Map SYSCON registers */
- if (of_hasprop(phandle, "syscon")) {
- const int syscon_phandle = fdtbus_get_phandle(phandle,
- "syscon");
- if (syscon_phandle == -1)
- return ENXIO;
- if (fdtbus_get_reg(syscon_phandle, 0, &addr, &size) != 0)
- return ENXIO;
- if (size < EMAC_CLK_REG + 4)
- return ENXIO;
- addr += EMAC_CLK_REG;
- size -= EMAC_CLK_REG;
- } else {
- if (fdtbus_get_reg(phandle, 1, &addr, &size) != 0)
- return ENXIO;
- }
- if (bus_space_map(sc->bst, addr, size, 0, &sc->bsh[_RES_SYSCON]) != 0)
+ /* Get SYSCON registers */
+ sc->syscon = fdtbus_syscon_acquire(phandle, "syscon");
+ if (sc->syscon == NULL)
return ENXIO;
/* The "ahb"/"stmmaceth" clock and reset is required */
