Module Name: src Committed By: martin Date: Thu Mar 19 19:21:37 UTC 2020
Modified Files: src/sys/dev/mii [netbsd-9]: atphy.c miidevs src/sys/dev/pci [netbsd-9]: if_nfe.c Log Message: Pull up following revision(s) (requested by msaitoh in ticket #786): sys/dev/pci/if_nfe.c: revision 1.77 sys/dev/pci/if_nfe.c: revision 1.78 sys/dev/mii/atphy.c: revision 1.28 sys/dev/mii/atphy.c: revision 1.29 sys/dev/mii/miidevs: revision 1.166 Use unsigned to avoid undefined behavior. Found by kUBSan. 0x001374 is non-bitreversed value of Attansic OUI(0x00c82e). Attansic/Atheros correctly uses ID1 and ID2 register, so delete all 0x001374 related entries. Improve error check: - We check PHY register read error correctly (timeout and NFE_PHY_ERROR), so don't check NFE_PHY_DATA register's value with 0xffffffff or 0. At least, some registers may have 0. - Check NFE_PHY_ERROR bit in nfe_miibus_writereg(). - Improve debug printf Fix a bug that atphy(4) doesn't work with Attansic L2 rev. 1. Reported by Rocky Hotas. - On ASUS M2N-MX SE Plus (NVIDIA MCP61 with Attansic L2 rev. 1), changing debug port 0x29's value makes the next PHY read fail with error. Read any register to ignore this problem if the PHY is Attansic L2 revision 1. I don't know if this problem is from L2 rev. 1 itself or from the combination because I have only one machine which has L2 rev. "1". At least, ASUS eee pc 900 (Attansic L2 rev. "2") has no this problem. - Add comment. AR8021 document has no description about the power saving control register(debug port 0x29). - Add comment. AR8031 document says the lower 14 bits are reserved and the default value is 0x36d0. Shouldn't we clear those bits? - I have no document neither L1(F1) nor L2(F2), so I don't know whether the debug port access is correct or not. Tested with the following machines: - ASUS P5B SE, L1 rev. 5, age(4) - ASUS K50IJ, L1 rev. 9, ale(4) - ASUS eee pc 900, L2 rev. 2, lii(4) - ASUS M2N-MX SE Plus, L2 rev. 1, nfe(4) - Intel DP55WB, 82578(AR8021 rev. 2), wm(4) - Dell inspiron 14z, AR0835 rev. 9, alc(4) To generate a diff of this commit: cvs rdiff -u -r1.22.4.1 -r1.22.4.2 src/sys/dev/mii/atphy.c cvs rdiff -u -r1.153.2.4 -r1.153.2.5 src/sys/dev/mii/miidevs cvs rdiff -u -r1.71 -r1.71.2.1 src/sys/dev/pci/if_nfe.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.