Module Name: src Committed By: msaitoh Date: Fri Mar 27 09:47:03 UTC 2020
Modified Files: src/sys/arch/x86/x86: coretemp.c Log Message: Add special handling for model 0x0f stepping >=2 or mode 0x0e to get Tjmax. To generate a diff of this commit: cvs rdiff -u -r1.36 -r1.37 src/sys/arch/x86/x86/coretemp.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.