Module Name: src Committed By: macallan Date: Tue Dec 23 15:13:30 UTC 2014
Modified Files:
src/sys/arch/mips/ingenic: ingenic_dwctwo.c
Log Message:
establish interrupt
do some PHY setup, now the hardware actually responds
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/mips/ingenic/ingenic_dwctwo.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
