Module Name: src Committed By: skrll Date: Sat Jun 3 11:51:59 UTC 2017
Modified Files:
src/sys/arch/arm/arm: disassem.c
Log Message:
Adjust the output of {ldr,str}x instructions slightly and deal with the
writeback bit.
To generate a diff of this commit:
cvs rdiff -u -r1.38 -r1.39 src/sys/arch/arm/arm/disassem.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
