Module Name: src Committed By: maya Date: Wed Mar 7 23:08:29 UTC 2018
Modified Files:
src/sys/arch/mips/include: cpu.h
Log Message:
Adjust ci on the second iteration.
Now a MULTIPROCESSOR+LOCKDEBUG ERLITE reaches userland again
To generate a diff of this commit:
cvs rdiff -u -r1.123 -r1.124 src/sys/arch/mips/include/cpu.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
