Module Name: src Committed By: msaitoh Date: Tue Apr 10 08:18:38 UTC 2018
Modified Files: src/sys/dev/pci: if_wmreg.h Log Message: SW PHY Config Enable bit for ICH8 B0 stepping is not bit 1 but bit 0. To generate a diff of this commit: cvs rdiff -u -r1.105 -r1.106 src/sys/dev/pci/if_wmreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.