Module Name: src Committed By: aymeric Date: Sun Oct 14 18:53:01 UTC 2018
Modified Files:
src/sys/arch/arm/altera: cycv_rstmgr.c
Log Message:
Fix off-by-one when computing reset register address
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/altera/cycv_rstmgr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
