Module Name: src Committed By: msaitoh Date: Fri Mar 8 03:44:19 UTC 2019
Modified Files:
src/sys/dev/pci: pcidevs
Log Message:
- Add other two Core 8G host bridges.
- Add Intel Xeon E devices.
To generate a diff of this commit:
cvs rdiff -u -r1.1366 -r1.1367 src/sys/dev/pci/pcidevs
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
