CVSROOT: /cvs
Module name: src
Changes by: gkoeh...@cvs.openbsd.org 2020/12/29 23:06:31
Modified files:
sys/arch/powerpc64/dev: opal.c
sys/arch/powerpc64/include: cpu.h cpufunc.h trap.h
sys/arch/powerpc64/powerpc64: cpu.c genassym.cf locore.S
machdep.c trap_subr.S
sys/dev/ofw : fdt.c openfirm.h
Log message:
Enter power-saving mode on POWER9 (ISA v3)
When opal(4) attaches, look in the device tree for a psscr value. In
cpu_idle_cycle(), use this psscr value and the stop instruction to
wait for the next interrupt. In mp kernels, cpu_unidle() now sends an
interrupt. In "sysctl hw.sensors", the power and temperature sensors
from opalsens(4) may show lower values.
The cpu may exit stop at the system reset vector after losing user
registers. If so, restore some registers. For now, ignore deeper
stop states that would lose hypervisor registers.
Our mp kernel uses only the first hardware thread of each core. Take
the extra threads from the firmware and stop them forever; this may
switch the core from SMT4 to single-thread mode and increase
performance.
partly by kettenis@, ok kettenis@
