CVSROOT: /cvs Module name: src Changes by: kette...@cvs.openbsd.org 2021/02/17 05:11:45
Modified files: sys/arch/arm64/arm64: exception.S intr.c trampoline.S sys/arch/arm64/include: cpu.h intr.h profile.h sys/arch/arm64/dev: agintc.c ampintc.c bcm2836_intr.c Log message: Add support for FIQs. We need these to support agtimer(4) on Apple M1 SoCs since its interrupts seem to be hardwared to trigger an FIQ instead of an IRQ. This means we need to manipulate both the F and the I bit in the DAIF register when enabling and disabling interrupts. ok patrick@