CVSROOT: /cvs
Module name: src
Changes by: [email protected] 2021/03/16 04:57:47
Modified files:
sys/arch/arm64/arm64: cpu.c locore.S pmap.c
Log message:
Fix some correctness issues in the lowelevel kernel bringup code.
- Make sure we install a dummy page table in TTBR0_EL1 before we change
the size of the VA space in TCR_EL1.
- Flush the TLB after updating TCR_EL1.
- Flush TLB after installing the real kernel page table in TTBR1_EL1.
- Add some barriers around TLB flushes to make it consistent with
other places where we do TLB flushes.
ok drahn@, patrick@
