CVSROOT: /cvs Module name: src Changes by: [email protected] 2021/09/14 06:03:49
Modified files:
sys/arch/riscv64/riscv64: machdep.c
Added files:
sys/arch/riscv64/include: sysarch.h
Log message:
Provide instruction cache invalidation through sysarch(RISCV_ICACHE_SYNC)
Modelled after the arm implementation. The first consumer would be
__builtin___clear_cache() in libcompiler_rt.
Input from kettenis@ and deraadt@, ok kettenis@
