CVSROOT: /cvs
Module name: src
Changes by: chel...@cvs.openbsd.org 2022/11/19 09:23:48
Modified files:
sys/arch/mips64/include: cpu.h _types.h
sys/arch/mips64/mips64: clock.c mips64_machdep.c
sys/arch/loongson/dev: apm.c glxclk.c
Log message:
mips64, loongson, octeon: switch to clockintr
- Remove mips64-specific clock interrupt scheduling bits from cpu_info.
- Add missing tick_nsec initialization to cpu_initclocks().
- Disable the glxclk interrupt clock on loongson. visa@/miod@ say it
can be removed later if it isn't useful for anything else.
- Wire up cp0_intrclock.
Notes:
- The loongson apm_suspend() changes are untested, but deraadt@ claims
APM suspend/resume on loongson doesn't work anyway.
- loongson and octeon now have a randomized statclock(), stathz = hz.
With input from miod@, visa@. Tested by miod@, visa@.
Link: https://marc.info/?l=openbsd-tech&m=166776379603497&w=2
ok visa@ mlarkin@
