CVSROOT: /cvs Module name: src Changes by: kette...@cvs.openbsd.org 2024/03/18 12:35:21
Modified files:
sys/arch/arm64/arm64: cpu.c
sys/arch/arm64/include: armreg.h
Log message:
Add support for the new layout of the CCSIDR_EL1 register that was
introduced in Armv8.3 when the CCIDX feature is advertised. This
makes us properly detect the cache size on newer CPU cores like
Neoverse N2, at least when emulated by QEMU.
ok jsg@
