CVSROOT: /cvs
Module name: src
Changes by: [email protected] 2026/04/16 09:50:58
Modified files:
sys/arch/octeon/dev: octciu.c
Log message:
sys/octeon: cleanup all interrupts
octciu_next_irq() operates on a uint64_t pending interrupt bitmap, and
irq spans the full 0..63 range. Using 1u << irq therefore builds a 32
bit mask for a 64 bit word; once irq >= 32, the selected pending bit is
no longer cleared correctly.
The immediate consequence is loss of forward progress in the dispatcher
loop: the same interrupt can remain logically pending in the local copy
of isr, the loop can revisit it indefinitely, and the CPU can remain
trapped in interrupt handling.
OK: kettenis@, jca@, deraadt@
