CVSROOT: /cvs
Module name: src
Changes by: [email protected] 2026/05/04 14:21:02
Modified files:
sys/arch/arm64/arm64: locore.S
Log message:
Handle HCR_EL2.E2H RES1 behaviour
An implementation is allowed to make HCR_EL2.E2H RES1, which means
that the CPU behaves as if this bit was 1, even if it reads as 0
or can be written with 0.
While the architecture advertises this via ID_AA64MMFR4_EL1.E2H0,
hypervisors cannot always expose this to a guest if the hardware
doesn't implemtn FEAT_FGT.
Instead, detect the effects of HCR_EL2.E2H being RES1 by checking
for the aliasing property between accessors targetting the same
register (FAR_ELx in this case). This gives a reliable litmus test
for CPUs that are stuck in VHE mode.
>From Marc Zyngier <[email protected]>
