CVSROOT: /cvs
Module name: src
Changes by: [email protected] 2026/08/07 13:07:30
Modified files:
sys/arch/riscv64/riscv64: bus_dma.c
sys/arch/arm64/arm64: bus_dma.c
Log message:
The previous fix to bus_dmamap_load() wasn't quite right. We do need
virtual address continuity when we're bouncing. So a !bounce check
was correct, but only in the case when DMA is cache coherent. Note that
this becomes identical to the amd64 equivalent of this code when one
considers that on amd64 DMA is always cache coherent.
ok deraadt@, jca@
