CVSROOT: /cvs
Module name: src
Changes by: [email protected] 2026/09/24 11:57:24
Modified files:
sys/arch/arm/arm: pmap7.c
Log message:
sys/arm: avoid cache faults on untranslated aliases
An executable PV entry does not establish a usable hardware translation;
for an unreferenced prefaulted page, pmap_enter() can install an L2 PTE
with its access flag clear while leaving the L1 descriptor invalid.
pmap_clean_page() nevertheless uses such aliases for cache maintenance;
during address space teardown, a translation abort can reenter
uvm_fault() while the current thread owns the map write lock, provoking
recursive acquisition of vmmaplk.
Inspect each executable alias's L1 descriptor before issuing cache
maintenance by virtual address; if it is invalid, use
cpu_idcache_wbinv_all() and return, since the operation covers the
remaining aliases. This preserves data cache cleaning and instruction
cache invalidation without translating the unusable address; aliases
with valid L1 descriptors retain the existing per page operation.
This idea follow discovered discussion in linux-arm-kernel:
https://lists.infradead.org/pipermail/linux-arm-kernel/2018-January/556458.html
Tested by phessler@
OK: kettenis@
