CVSROOT: /cvs
Module name: src
Changes by: [email protected] 2014/03/09 04:12:17
Modified files:
sys/arch/mips64/include: cpu.h
sys/arch/mips64/mips64: cache_loongson2.c cache_octeon.c
cache_r10k.c cache_r4k.c cache_r5k.c
cache_tfp.c cpu.c mips64_machdep.c
sys/arch/octeon/include: cpu.h
sys/arch/octeon/octeon: machdep.c
sys/arch/sgi/include: cpu.h
sys/arch/sgi/localbus: tcc.c
sys/arch/sgi/sgi: ip22_machdep.c ip30_machdep.c machdep.c
Log message:
Rework the per-cpu cache information. Use a common struct to store the line
size, the number of sets, and the total size (and the set size, for convenience)
per cache (I$, D$, L2, L3).
This allows cpu.c to print the number of ways (sets) of L2 and L3 caches from
the cache information, rather than hardcoding this from the processor type.
